• Journal of Broadcast Engineering
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• v.2 no.1
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• pp.8-15
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• 1997

In this paper, a real-time operating Motion Picture Experts Group-1 (MPEG-1) audio encoder system is implemented using a TMS320C31 Digital Signal Processor (DSP) chip. The basic operation of the MPEG-1 audio encoder algorithm based on audio layer-2 and psychoacoustic model-1 is first verified by C-language. It is then realized using the Texas Instruments (Tl) assembly in order to reduce the overall execution time. Finally, the actual BSP circuit board for the encoder system is designed and implemented. In the system, the side-modules such as the analog-to-digital converter (ADC) control, the input/output (I/O) control, the bit-stream transmission from the DSP board to the PC and so on, are utilized with a field programmable gate array (FPGA) using very high speed hardware description language (VHDL) codes. The complete encoder system is able to process the stereo audio signal in real-time at the sampling frequency 48 kHz, and produces the encoded bit-stream with the bit-rate 192 kbps. The real-time operation capability of the encoder system and the good quality of the decoded sound are also confirmed using various types of actual stereo audio signals.

• Journal of Advanced Navigation Technology
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• v.23 no.5
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• pp.452-459
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• 2019

In this paper, we describe a PCM encoder structure that can update the telemetry system parameters in real time. In the PCM encoder, an analog signal control unit for FPGA, flash memory, and sensor data acquisition was constructed. UART communication, analog signal control, flash memory control, and frame generation are possible through logic inside FPGA of PCM encoder. UART communication allows the PC to transmit parameter data to the PCM encoder, and flash memory is controlled to update the parameter of the telemetry system in real time and finally the frame is formed. Simulation and verification were performed to confirm whether the parameter data is updated in real time, and the proposed structure was used to construct a telemetry system with enhanced flexibility and convenience.

• Journal of Digital Convergence
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• v.10 no.6
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• pp.241-246
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• 2012

In this paper, we apply the next generation Internet Broadcasting Move Picture solution, FlashVideo has been designed and implemented. Currently being broadcast in the field to compress HD video in real time, as well as live Internet VOD services are available through the online system, the Internet LIVE broadcast and VOD service easy to operate and UCC services that support the solution. VOD video cameras and in real time using H264 CORECODEC to compress MPEC4, WMV, and real-time video streaming on the Internet, and phone system that supports the first, real-time recording of camera images featured nation's first real-time encoder system (Real time encoder system) is, Web and smart environment suitable for supporting the latest CORECODEC technology and software products. Second, the video can be played in MP4 player and customize your chat, and customizing is a possible two-way Internet Broadcasting System. Third, CMS (Contents Management System) feature video contents and course management contents in real time via the Android phone and iPhone streaming service is available.

• Convergence Security Journal
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• v.12 no.3
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• pp.93-97
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• 2012

In this paper, we apply the next generation Internet TV solution, FLV has been designed and implemented. Currently being broadcast in the field to compress HD video in real time, as well as live Internet VOD services are available through the online system, the Internet LIVE broadcast and VOD service easy to operate and UCC services that support the solution. VOD video cameras and in real time using H264 CORECODEC to compress MPEC4, WMV, and real-time video streaming on the Internet, and phone system that supports the first, real-time recording of camera images featured nation's first real-time encoder system (Real time encoder system) is, Web and smart environment suitable for supporting the latest CORECODEC technology and software products. Second, the video can be played in MP4 player and customize your chat, and Custer (customizing) is a possible two-way Internet Broadcasting System. Third, CMS (Contents Management System) feature video content and course management content in real time via the Android phone and iPhone streaming service is available.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.10C
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• pp.983-991
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• 2009

While H.264/AVC is in wide use for multimedia applications such as DMB and IPTV service, we have limited usage cases for embedded real-time applications due to its high computational demand. The paper provides judicious guide line for optimization method selection, by presenting the detailed experiments data through the development process of a real time H.264 software encoder on embedded DSP. The experimental analysis includes an intensive profiling analysis, fast algorithm application, optimal memory assignment, and intrinsic-based instruction selection. We have realized a real-time software that encodes CIF resolution videos 15 fps on TMS320DM64x processors.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.8 no.1
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• pp.75-81
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• 2008

This paper presents a top-down approach to implement an MPEG-2 audio encoder in VLSI. As the algorithm of an MPEG-2 audio encoder is heavy-weighted and heterogeneous(to be mixture of several strategies), the encoder design process is undertaken carefully from the algorithmic level to the architectural level. Firstly, the encoding algorithm is analyzed and divided into sub-algorithms, called tasks, and the tasks are partitioned in the way of reusing the same designs. Secondly, the partitioned tasks are scheduled and synthesized to make the most efficient use of time and space. In the end, a real-time 5 channel MPEG-2 audio encoder is designed which is a heterogeneous multiprocessor system; two hardwired logic blocks and one specialized DSP processor.

• Journal of information and communication convergence engineering
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• v.6 no.1
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• pp.29-33
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• 2008

This paper presents the proposal and hardware design of JPEG baseline encoder. The JPEG encoder system consists of line buffer, 2-D DCT, quantization, entropy encoding, and packer. A fully pipelined scheme for JPEG encoder is adopted to speed-up an image compression. The proposed architecture was described in VHDL and synthesized in Xilinx ISE 7.1i and simulated by modelsim 6.1i. The results showed that the performance of the designed JPEG baseline encoder is higher than that demanded by real-time applications for $1024{\times}768$ image size. The designed JPEG encoder IP can be easily integrated into various application systems, such as scanner, PC camera, color FAX, and network camera, etc.

• Journal of the Korean Operations Research and Management Science Society
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• v.24 no.3
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• pp.63-72
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• 1999

Recent studies on the Constant Bit Rate and Variable Bit Rate transmissions have mainly focused on the frame by frame encoder rate control based on the quantization parameter. With the existing approaches it is difficult to guarantee a consistent video quality. Also, the rate control overhead is too high for the real-time video sources. In this paper, a channel rate allocation scheme based on the control period is proposed to transmit a real-time video, in which the control period is defined by a pre-specified number of frames or group of pictures. At each control period, video traffic information is collected to determine the channel rate at the next control period. The channel rate is allocated to satisfy various channel rate constraints such that the buffer occupancy at the decoder is maintained at a target level. If the allocated channel rate approaches the level at which the negotiated traffic descriptions may be violated, the encoder rate is decreased through adjusting quantization parameters in the MPEG encoder. In the experimental results, the video quality and the overflow and underflow probabilities at the buffer are compared at different control periods. Experiments show that the video quality and the utilization of network bandwidth resources can be optimized through the suitable selection of the control period.

• Journal of Advanced Navigation Technology
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• v.28 no.3
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• pp.315-322
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• 2024

In this paper, we proposes real-time operating system based PCM encoder for telemetry system that must transmit frames within a set time. In the case of large aircraft, the complexity of the system is increasing because a lot of state information is measured from each sensor and peripheral device. In addition, as the amount measurement data increases, the role of PCM encoder to transmit frames within a set time is becoming important. Existing encoder is inflexible when changing specifications or implementing additional features. Therefore, a design is needed to supplement this. We propose a PCM encoder design applying uC/OS-II. In order to confirm the validity, a simulation was performed to measure the execution time of the task to confirm the performance.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.10a
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• pp.271-274
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• 2014

This paper proposes high-performance SAO(Sample Adaptive Offset) in HEVC(High Efficiency Video Coding) encoder for Ultra HD video processing in real time. SAO is a newly adopted technique belonging to the in-loop filter in HEVC. The proposed SAO encoder hardware architecture uses three-layered buffers to minimize memory access time and to simplify pixel processing and also uses only adder, subtractor, shift register and feed-back comparator to reduce area. Furthermore, the proposed architecture consists of pipelined pixel classification and applying SAO parameters, and also classifies four consecutive pixels into EO and BO concurrently. These result in the reduction of processing time and computation. The proposed SAO encoder architecture is designed by Verilog HDL, and implemented by 180k logic gates in TSMC $0.18{\mu}m$ process. At 110MHz, the proposed SAO encoder can support 4K Ultra HD video encoding at 30fps in real time.