• 한국표면공학회지
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• 제35권3호
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• pp.158-164
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• 2002

Nanocomposites consisting of a nanocrystalline brass matrix (grain size ; 20-100nm) with sub-micron sized Al2O3 particles (60-200nm) were prepared by pulsed current electrodeposition. The microhardness of the nanocomposite with a grain size of 90-100nm was approximately 1.7 times higher than that of a comparable electrodeposit with no particles. However, significant variations in microhardness were not observed between the nanocomposites with grain sizes of 20 nm and the comparable electrodeposit.

• 한국재료학회지
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• 제19권3호
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• pp.151-155
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• 2009

Micro-scale copper bumps for build-up PCB were electroplated using a pulse-reverse method. The effects of the current density, pulse-reverse ratio and brightener concentration of the electroplating process were investigated and optimized for suitable performance. The electroplated micro-bumps were characterized using various analytical tools, including an optical microscope, a scanning electron microscope and an atomic force microscope. Surface analysis results showed that the electroplating uniformity was viable in a current density range of 1.4-3.0 A/$dm^2$ at a pulse-reverse ratio of 1. To investigate the brightener concentration on the electroplating properties, the current density value was fixed at 3.0 A/$dm^2$ as a dense microstructure was achieved at this current density. The brightener concentration was varied from 0.05 to 0.3 ml/L to study the effect of the concentration. The optimum concentration for micro-bump electroplating was found to be 0.05 ml/L based on the examination of the electroplating properties of the bump shape, roughness and grain size.

• 대한금속재료학회지
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• 제49권12호
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• pp.937-944
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• 2011

Studies have been carried out in order to reduce fuel-cladding chemical interaction (FCCI) behavior of metallic fuel in sodium-cooled fast reactors (SFR) using an electroplating technique. A $20{\mu}m$ thick Cr layer has been plated by the electrochemical method in the Sargent bath over the HT9 (12Cr-1Mo) clad material and diffusion couple tests of the U-10Zr metallic fuel as well as the rare earth alloy (70Ce-29La) have been conducted. The results show that the Cr plating can prevent FCCI behavior along the fuel-clad interface. However, cracks developed through the thickness during plating, which resulted in the migration of some fuel constituents. Variation of bath temperature, application of pulse current, and post heat treatment have been conducted to control such cracks. We found out that some conditions like the pulse current and the post heat treatment enhanced the layer property by reducing the internal cracks and improving the diffusion couple test.

• 대한금속재료학회지
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• 제49권5호
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• pp.388-394
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• 2011

High speed copper filling into TSV (through-silicon-via) for three dimensional stacking of Si chips was investigated. For this study, a tapered via was prepared on a Si wafer by the DRIE (deep reactive ion etching) process. The via had a diameter of 37${\mu}m$ at the via opening, and 32${\mu}m$ at the via bottom, respectively and a depth of 70${\mu}m$. $SiO_2$, Ti, and Au layers were coated as functional layers on the via wall. In order to increase the filling ratio of Cu into the via, a PPR (periodic pulse reverse) wave current was applied to the Si chip during electroplating, and a PR (pulse reverse) wave current was applied for comparison. After Cu filling, the cross sections of the vias was observed by FE-SEM (field emission scanning electron microscopy). The experimental results show that the tapered via was filled to 100% at -5.85 mA/$cm^2$ for 60 min of plating by PPR wave current. The filling ratio into the tapered via by the PPR current was 2.5 times higher than that of a straight via by PR current. The tapered via by the PPR electroplating process was confirmed to be effective to fill the TSV in a short time.

• 한국표면공학회:학술대회논문집
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• 한국표면공학회 2002년도 춘계학술발표회 초록집
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• pp.35-35
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• 2002

Atomic force microscopy was applied to study the formation and growth mechanism of thin chrome layers prepared under various pulse plating conditions. The chrome was electro-deposited from an electrolyte bath containing 250 gl-l of chromic acid, 25 gl-l of sulfuric acid using direct current density of $1.6{\;}mA.$\textrm{mm}^{-2} and pulse currents with on-off time from 5 to 900 ms. The higher current density enhanced nucleation rate which resulted in refining grain size. The chrome growth kinetics determining nodule size and shape significantly depends on the duration of on-time rather than duration of off-time and on/off time ratio.

• 한국표면공학회지
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• 제22권4호
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• pp.207-214
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• 1989

The surface morphology and the proferred orientation of the Pb-Sn alloy electrodeposite were investated by the change of electrolysis conditions in pulse current electroplating. The preferred orientation of Pb-phase in alloy deposits was changed in the sequence of (110)longrightarrow(100)or(100)+(111)longrightarrow(111) with increasing peak current density, while that of $\beta$-Sn phase changed from (321)+(301)to(301)+(111) mixed orientation. The surface morphology was closely related to the preferred orientation of alloy electrodeposits. The alloy deposits, which had (100)or(111) for pb-phase and (321)or(100)(301)for $\beta$-Sn sespectively, showed the surface structure of granular crystallites. The alloy deposits whih mixed orientations for both phases had microstructure of closely the closely stacked crysrallites, which was inclined to the surface.

• 한국표면공학회지
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• 제49권2호
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• pp.111-118
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• 2016

A method to quantitatively analyze the defects formed by the hydrogen evolution during electroplating was suggested based on the theoretical approach of the small angle neutron scattering technique. In case of trivalent chrome layers, an isolated defect size due to the hydrogen evolution was about 40 nm. Direct and pulse plating conditions gave the average defect size of about 4.9 and $4.5{\mu}m$ with rod or calabash shape, respectively. Current density change of the pulse plating from $1.5A/dm^2$ to $2.0A/dm^2$ enlarged the average defect size from 3.3 to $7.8{\mu}m$. The defect morphology like rod or calabash was originated by inter-connecting the isolated defects. Small angle neutron scattering was useful to quantitatively evaluate defect morphology of the deposit.

• 한국표면공학회지
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• 제24권3호
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• pp.125-136
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• 1991

a mathematical model is presented to describe the current distribution on a rotaing disk electrode under the galvanostatic pulse conlitions. A numerical technique by finite difference method to the transient convective diffusion equation, coordinate transformation and separation of variables to Laplace equation, and an iterative algorithm to solve the above equations simtltaneously with approximate boundary conditions were developed. An experimental investigated based on copper deposition in a copper sulfate-sulfuric acid system was performed and satisfactory agreement was obtained between expermental and theoretical current distribution. The current distribution of copper deposition is secondary current distribution within the experimental conditions. Dimensionless variables, N and J as well as Wagner number were used to determine the criteria for the uniformity of current distribution.

• 한국재료학회지
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• 제18권3호
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• pp.117-122
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• 2008

Micro-sized bumps on a multi-layered build-up PCB were fabricated by pulse-reverse copper electroplating. The values of the current density and brightener content for the electroplating were optimized for suitable performance with maximum efficiency. The micro-bumps thus electroplated were characterized using a range of analytical tools that included an optical microscope, a scanning electron microscope, an atomic force microscope and a hydraulic bulge tester. The optical microscope and scanning electron microscope analyses results showed that the uniformity of the electroplating was viable in the current density range of $2-4\;A/dm^2$; however, the uniformity was slightly degraded as the current density increased. To study the effect of the brightener concentration, the concentration was varied from zero to 1.2 ml/L. The optimum concentration for micro-bump electroplating was found to be 0.6 ml/L based on an examination of the electroplating properties, including the roughness, yield strength and grain size.

• 한국재료학회지
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• 제23권10호
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• pp.550-554
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• 2013

As continued scaling becomes increasingly difficult, 3D integration has emerged as a viable solution to achieve higher bandwidths and good power efficiency. 3D integration can be defined as a technology involving the stacking of multiple processed wafers containing integrated circuits on top of each other with vertical interconnects between the wafers. This type of 3D structure can improve performance levels, enable the integration of devices with incompatible process flows, and reduce form factors. Through silicon vias (TSVs), which directly connect stacked structures die-to-die, are an enabling technology for future 3D integrated systems. TSVs filled with copper using an electro-plating method are investigated in this study. DC and pulses are used as a current source for the electro-plating process as a means of via filling. A TiN barrier and Ru seed layers are deposited by plasma-enhanced atomic layer deposition (PEALD) with thicknesses of 10 and 30 nm, respectively. All samples electroplated by the DC current showed defects, even with additives. However, the samples electroplated by the pulse current showed defect-free super-filled via structures. The optimized condition for defect-free bottom-up super-filling was established by adjusting the additive concentrations in the basic plating solution of copper sulfate. The optimized concentrations of JGB and SPS were found to be 10 and 20 ppm, respectively.