• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.6
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• pp.1365-1376
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• 1997

In this paper, we designed real time mechanism control language and proposed execution time analysis technique. It was impossible to handle real-time mechanism control programs like programmable controller, numerical controller, distributed control system and robot controller with general purpose programming languages and operating systems because they have to process electric signals generated by thousands of sensors at the same at the same time and in real time. So we made it possible to predict plausibility of time constraint constructs of tiem constraint construct of a real time application program at compilation time by adding time constraint constructs and mechanism synchronization structure to conditional statement and iteration statement of a programming language and developing execution time analysis technique.

• Journal of Power Electronics
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• v.10 no.1
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• pp.65-71
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• 2010

This paper presents the design and implementation of voltage source inverter type SVPWM based speed control of an induction motor using a fuzzy PI controller. This scheme enables us to adjust the speed of the motor by controlling the frequency and amplitude of the stator voltage; the ratio of the stator voltage to the frequency should be kept constant. A model of the fuzzy control system is implemented in real time with a Xilinx FPGA XC3S 400E. It is introduced to maintain a constant speed to when the load varies.

• International Journal of Control, Automation, and Systems
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• v.1 no.2
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• pp.252-256
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• 2003

A biped robot should be designed to be an effective mechanical structure and have smaller hardware system if it is to be a stand-alone structure. This paper shows the design methodology of a biped robot controller using FPGA(Field Programmable Gate Array). A hardware system consists of DSP(Digital Signal Processor) as the main CPU, and FPGA as the motor controller. By using FPGA, more flexible hardware system has been achieved, and more compact and simple controller has been designed.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2000.11a
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• pp.233-238
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• 2000

CNC machine tool is assembled by central processor, PLC(Programmable Logic Controller), and actuator. The sequential control of machine generally controlled by a PLC. The main fault occured at PLC in 3 control parts. In LC faults, operational fault is charged over 70%. This paper describes diagnosis model and data processing for remote monitoring and diagnosis system in machine tools with open architecture controller. Two diagnostic models based on the ladder diagram. Logical Diagnosis Model(LDM), Sequential Diagnosis Model(SDM), are proposed. Data processing structure is proposed ST(Structured Text) based on IEC1131-3. The faults from CNC are received message form open architecture controller and faults from PLC are gathered by sequential data.. To do this, CNC and PLC's logical and sequential data is constructed database.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.2
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• pp.94-97
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• 2007

The desin and implementation of a CMOS analog integrated circuit that provides dual-mode modulations, PWM for active clamp reset converter and PFM for LLC resonant converter, is described. The proposed controller is capable of implementing programmable soft start and current-mode control with compensating ramp for PWM and frequency shifting soft start for PFM. Also it provides delay time for both modes. PWM mode is implemented by active clamp reset converter and PFM mode is implemented by LLC resonant convereter, respectively. The chip is fabricated using the 0.6um high voltage CMOS process.

• Proceedings of the KIEE Conference
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• 1995.11a
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• pp.182-185
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• 1995

The travelling ultrasonic motor(USM) has good some characteristics over conventional servo motors such as compact size, light weight, silent moton, high torque and high speed response. The USM is driven by 2-phase AC electricity. By adjusting the phase difference of the motor power we control rotation, speed and torque of USM. In this paper, we propose design method using PLSI(programmable Large Scale Integration) of USM controller to adjust the phase difference of the motor power. As compared the previous, the new controller has some advantage that high speed, predictable performance, low power and so on.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.50 no.6
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• pp.266-271
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• 2001

In this paper, a controller design for coreless linear synchronous motor is proposed. The designed controller is mainly composed of speed and current control, which are carried out by the high-speed digital signal processor(DSP). In addition the PWM inverter is controlled by space voltage PWM method. This system is implemented using by 32-bit DSP(TMS320C31), a high-integrated logic device(EPM940), and IPM(Intelligent Power Modules) for compact and powerful system design. The experimental results show the effective performance of controller for coreless linear synchronous motor.

• Korean Journal of Food Science and Technology
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• v.20 no.6
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• pp.845-849
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• 1988

A laboratory scale storage facility consisting of a cold room, sample jars and a ventilation device was designed and built. Storaging sample jars (1.7 l) for fruit were fabricated with transparent acryl and provided with a constant air flow. For the supplying of air to sample jars, the air distributing system was built with solenoid valves, an air precooling coil and a pressure equalizing tank. To provide the programmable storaging environment of the facility a microprocessor-based controller was designed and installed. The controller was built with the 8 bit microprocessor (Z-80), EPROM, RAM, programmable peripheral interface(8255 PPI), and A/D converter. Softwares for the auto-temperature measurement and control of the storage system were developed and systemized in ROM. The automated storage system was applied to citrus storage, and the temperature of the storage facilities was successfully acquisited to the computer and controlled.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.8
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• pp.1424-1433
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• 2007

In this paper, we propose a hardware architecture to generate digital hologram using the modified CGH (Computer Generated Hologram) algorithm for hardware implementation and design to FPGA (Field Programmable Gate Array) platform. After analyzing the CGH algorithm, we propose an architecture of CGH cell which efficiently products digital hologram, and design CGH Kernel from configuring CGH Cell. Finally we implement CGH Processor using CGH Kernel, SDRAM Controller, DMA, etc. Performance of the proposed hardware can be proportionally increased through simply addition of CGH Cell in CGH Kernel, since a CGH Cell has operational independency. The proposed hardware was implemented using XC2VP70 FPGA of Xilinx and was stably operated in 200MHz clock frequency. It take 0.205 second for generating $1,280{\times}1,024$ digital hologram from 3 dimensional object which has 40,000 light sources.

• Journal of The Korean Astronomical Society
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• v.29 no.spc1
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• pp.389-390
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• 1996

The CCDs are widely used in astronomical observations either in direct imaging use or spectroscopic mode. However, the areas of available sensors are too small for large imaging format. One possibility to obtain large detection area is to assemble mosaics of CCD, and drive them simultaneously. Parallel driving of many CCDs together rules out the possibility of individual tuning; however, such optimisation is very important, when the ultimate low light level performance is required, particularly for new, or mixed devices. In this work, a new concept is explored for an entirely novel approach, where the drive waveforms are multiplexed and interleaved. This simultaneously reduces the number of leadout connections and permits individual optimisation efficiently. The digital controller can be designed within a single EPLD (Erasable Programmable Logic Device) chip produced by a CAD software package, where most of the digital controller circuits are integrated. This method can minimise the component. count., and improve the system efficiency greatly, based on earlier works by Han et a1. (1996, 1994). The system software has an open architecture to permit convenient modification by the user, to fit their specific purposes. Some variable system control parameters can be selected by a user with a wider range of choice. The digital controller design concept allows great flexibility of system parameters by the software, specifically for the compatibility to deal with any number of mixed CCDs, and in any format, within the practical limit.