• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.2
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• pp.307-314
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• 2011

A new predistortion technique for dynamic spectrum allocation systems such as cognitive radio (CR) is proposed. The system model considered in this paper occupies a small band at a time, but the center frequency can be changed in the wide range of frequency. In this scenario. the front-end filter may not eliminate the harmonics of the power amplifier (PA) output. The proposed PD reduces the spectral regrowth of the fundamental signal at the carrier frequency (${\omega}_0$) and removes the harmonics ($2{\omega}_0$, $3{\omega}_0$, ...) at the same time. The proposed PD structure is composed of multiple predistorters (PDs) centered at integer multiples of ${\omega}_0$. The PD at ${\omega}_0$ is for removing spectral regrowth of the fundamental signal, and the others are for harmonic reduction. In the proposed PD structure, parameters of PDs are found jointly. Simulation results show that the spectral regrowth can be reduced by 20dB, and the 2nd and 3rd harmonics can be reduced down to -70dB from the power of the fundamental signal.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.2 s.105
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• pp.124-128
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• 2006

In this paper, Compact Microstrip Resonant Cell(CMRC)s have been employed to suppress IMD(Intermodulation Distortion) of the 3-Way Doherty amplifier. This method can not only improve the linearity and the efficiency but also be simpler, smaller and more inexpensive than existing linearity methods; (for example harmonic feedback, back off, feed-forward, predistortion and so on) Also, using only one divider reduces the size of the proposed 3-Way Doherty amplifier. As a result, the IMD3 and the PAE have been improved by 4.5 dB and by $9.2\%$, respectively, using the proposed Doherty amplifier with CMRC.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.5
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• pp.521-526
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• 2003

This paper describes performance data and design information on a reflection-type analog phase shifter used in Ka-band. Arranging a couple of GaAs hyperabrupt junction varactor diode parallel in a circuit, and applying reactance matching method accordingly, it is possible to 831 a large the phase shift. Design equation is formulated theoretically. Since the assembly process is important in Ka-band, this paper also includes the assembly process that is essential to minimize the generation of parasitic elements during the assembly process. It is obtained variable phase shift 220$^{\circ}$${\pm}$7$^{\circ}$ and insertion loss 5 dB${\pm}$1 dB as a measured result larger than the existing figure in Ka-band.

• Journal of Advanced Navigation Technology
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• v.13 no.3
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• pp.358-364
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• 2009

This paper shows some variable bias techniques which can improve the power added efficiency(PAE) for the designed power amplifier. Some simulations have been done to get the effect of the bias change, and variable bias is adopted to get the higher efficiency for dual mode amplifier which generates two different output power levels. With drain bias change and a fixed gate bias, the amplifier shows PAE improvement compared to the fixed bias amplifier. In addition, this paper analyzed nonlinear distortion of the power amplifier and has used the digital predistortion which can result in 10dB ACPR improvement for the dual band amplifier.

• Journal of electromagnetic engineering and science
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• v.9 no.2
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• pp.71-77
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• 2009

OFDM(Orthogonal Frequency Division Multiplexing) signals sutler serious nonlinear distortion in the nonlinear HPA(High Power Amplifier) because of high PAPR(Peak Average Power Ratio). Nonlinear distortion can be improved by a pre-distorter, but this pre-distorter is insufficient when the PAPR is very high in an OPFDM system. In this paper, a DFT(Discrete Fourier Transform) transform technique is introduced for PAPR reduction. It is especially important to consider the memory effect of HPA for more precise predistortion. Therefore, in this paper, we consider two models, the TWTA(Traveling-Wave Tube Amplifier) model of Saleh without a memory effect and the HPA memory polynomial model that has a memory effect. We design a pre-distorter and an adaptive pre-distorter that uses the NLMS(Normalized Least Mean Square) algorithm for the compensation of this nonlinear distortion. Without the consideration of a memory effect, the system performance would be degraded, even if the pre-distorter is used for the compensation of the nonlinear distortion. From the simulation results, we can confirm that the proposed system shows an improvement in performance.

• Journal of electromagnetic engineering and science
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• v.9 no.2
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• pp.78-84
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• 2009

This paper represents the effects of drain bias on the linearity and efficiency of an analog pre-distortion power amplifier(PA) for wideband code division multiple access(WCDMA) repeater applications. For verification, an analog predistorter(APD) with three-branch nonlinear paths for memory-effect compensation is implemented and a class-AB PA is fabricated using a 30-W Si LOMaS. From the measured results, at an average output power of 33 dBm(lO-dB back-off power), the PA with APD shows the adjacent channel leakage ratio(ACLR, ${\pm}$5 MHz offset) of below -45.1 dBc, with a drain efficiency of 24 % at the drain bias voltage($V_{DD}$) of 18 V. This compared an ACLR of -36.7 dEc and drain efficiency of 14.1 % at the $V_{DD}$ of 28 V for a PA without APD.

• Journal of Advanced Navigation Technology
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• v.13 no.6
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• pp.846-853
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• 2009

This paper presents the design of a high efficiency frequency multiplier with load-pull simulation and analyses the nonlinear distortion of the frequency multiplier. The frequency multiplier shows serious distortion of multiplying signal bandwidth because of nonlinearity when modulated signal is applied, so a digital predistortion with look up table (LUT) is applied to compensate for the distortion of the frequency multiplier. The frequency multiplier is designed to produce 5.8GHz output by doubling the input frequency to be operating at IEEE 802.11a standard wireless LAN. The output spectrum shows 12dB ACPR improvement both at +11MHz, +20MHz offset from center frequency after linearization.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.2
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• pp.65-70
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• 2004

This paper presents a novel linearization scheme for a nonlinear RF amplifier It is based on the amplitude modulation with envelope signal. The 3rd order distortion generator is composed of two FETs and it adopts a balanced structure for the purpose of main carrier cancellation. The amplitude and phase of the IM3 component can be controlled at RF band. This predistorter is implemented and tested at the KOREA PCS Tx. band (1840∼1870MHz). Experimental results of two-tone test show that the IM3 cancellation is achieved about 30-40 ㏈ for the wide dynamic range. The adjacent channel power ratio is improved by over 10 ㏈ at the broad-band CDMA signal with a peak to average power ratio of l0㏈, and this improvement is maintained through a wide range of output power levels.

• Journal of electromagnetic engineering and science
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• v.14 no.4
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• pp.399-404
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• 2014

A power amplifier (PA) for a femto-cell base station should be highly efficient, linear and small. The efficiency for amplification of a high peak-to-average power ratio (PAPR) signal was improved by designing an asymmetric Doherty PA (DPA). The linearity was improved by applying third-order inter-modulation (IM3) cancellation method. A small size is achieved by designing the DPA using GaN MMIC process. The implemented 2-stage DPA delivers a power-added efficiency (PAE) of 38.6% and a gain of 33.4 dB with an average power of 34.2 dBm for a 7.2 dB PAPR 10 MHz bandwidth LTE signal at 2.14 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.3
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• pp.312-319
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• 2011

In this paper, a new linearization algorithm for DPD(Digital PreDistorter) is suggested. This new algorithm uses DFP(Davidon-Fletcher-Powell) method. This algorithm is more accurate than that of the existing algorithms, and this method renew the best-fit value in every routine with out setting the initial value of step-size. In modeling power amplifier, the memory polynomial model which can model the memory effect of the power amplifier is used. And the overall structure of linearizer is based on an indirect learning architecture. In order to verify for performance of proposed algorithm, we compared with LMS(Least Mean-Squares), RLS(Recursive Least squares) algorithm.