• JSTS:Journal of Semiconductor Technology and Science
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• 제11권4호
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• pp.318-328
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• 2011

Stage-level reconfigurable chip multiprocessor (CMP) aims to achieve highly reliable and fault tolerant computing by using interwoven pipeline stages and on-chip interconnect for communicating with each other. The existing crossbar-switch based stage-level reconfigurable CMPs offer high reliability at the cost of significant area/power overheads. These overheads make realizing large CMPs prohibitive due to the area and power consumed by heavy interconnection networks. On other hand, area/power-efficient architectures offer less reliability and inefficient stage-level resource utilization. In this paper, I propose a hierarchical multiplexing interconnection structure in lieu of crossbar interconnect to design area/power-efficient stage-level reconfigurable CMP. The proposed approach is able to keep the reliability offered by the crossbar-switch while reducing the area and power overheads. Experimental results show that the proposed approach reduces area by up to 21% and power by up to 32% when compared with the crossbar-switch based interconnection network.

• 한국정보처리학회논문지
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• 제6권3호
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• pp.766-772
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• 1999

With the increase of portable system and high-density IC, power consumption of VLSI circuits is very important factor in design process. Power estimation is required in order to estimate the power consumption. A simple and correct solution of power estimation is to use circuit simulation. But it is very time consuming and inefficient way. Probabilistic method has been proposed to overcome this problem. Transition density using probability was an efficient method to estimate power consumption using BDD and Boolean difference. But it is difficult to build the BDD and compute complex Boolean difference. In this paper, we proposed Propowest. Propowest is building a digraph of circuit, and easy and fast in computing transition density by using modified COP algorithm. Propowest provides an efficient way for power estimation.

• ETRI Journal
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• 제30권6호
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• pp.799-806
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• 2008

In this paper, a new design for an error correcting code (ECC) is proposed. The design is aimed to build an ECC circuitry with minimal power consumption. The genetic algorithm equipped with the symbiotic mechanism is used to design a power-efficient ECC which provides single-error correction and double-error detection (SEC-DED). We formulate the selection of the parity check matrix into a collection of individual and specialized optimization problems and propose a symbiotic evolution method to search for an ECC with minimal power consumption. Finally, we conduct simulations to demonstrate the effectiveness of the proposed method.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2008년도 하계종합학술대회
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• pp.499-500
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• 2008

In this paper, we design and implement the monolithic power factor correction IC for system power modules using a high voltage(50V) CMOS process. The power factor correction IC is designed for power applications, such as refrigerator, air-conditioner, etc. It includes low voltage logic, 5V regulator, analog control circuit, high-voltage high current output drivers, and several protection circuits. And also, the designed IC has standby detection function which detects the output power of the converter stage and generates system down signal when load device is under the standby condition. The simulation and experimental results show that the designed IC acts properly as power factor correction IC with efficient protective functions.

• 한국전자통신학회논문지
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• 제6권6호
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• pp.809-814
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• 2011

센서네트워크에서 주요자원문제는 에너지효율이다. 에너지를 효율적으로 사용하기 위한 방법에는 두 가지가 있다. 첫번째는 동적파워매니지먼트(DPM)이고, 두번째는 에너지효율프로토콜을 사용하는 것이다. DPM에서 파워메니저 OS는 이벤트에 관한 CPU와 각 I/O의 올바른 파워상태를 조절하는데 있다. 그러나, OS는 각 네트웤프로토콜의 내적동작에 대해서는 크게 관계가 없다. 또한, 에너지효율 프로토콜은 전파 PHY의 파워세이빙에 주요하게 맞춰져있다. 더불어, 무선 센서네트워크에서 대부분작업은 통신에 관계되어져있다. 본논문에서, 센싱부와 에드훅 무선센스노드 사이에 관계된 통신작업에서 상호협력 매니지먼트(CPM)을 통해 원치않는 파워소비을 줄일 수 있는 효율 파워메니져를 만들었다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 A
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• pp.59-62
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• 2002

Before a developed digital Power System Stabilizer(PSS) is installed to real power system, an efficient trial test for installing PSS is needed. In this paper, the performance of developed digital PSS for a single hydro-turbine generator and infinite bus system has been investigated using Real Time Digital Simulator(RTDS) in order to install PSS to real power system practically. The test system was composed of RTDS, three phase voltage/current amplifier and the PSS and the test scheme provided a very efficient way to verify the design and control performance of a PSS to be applied to real power system. The trial installation test through AVR 3% step test and three fault analysis may be guaranteed to install PSS to real power system.

• 동력기계공학회지
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• 제4권3호
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• pp.55-61
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• 2000

In this study, a new design of an one-body type of an unbalanced-fixed- displacement type vane pump combined with an induction type electric motor was suggested. By the application of the new design scheme, it was possible to reduce the number of parts of the pump system and to cut down the volume of power package than that of already-used products. The case in this study enabled efficient heat transfer and electricity insulation of hydraulic fluid. Thus oil moves through the inside of the package for cooling and returns to the reservoir. Because of this design, it was difficult to measure the shaft-input torque. Therefore the package overall efficiency in the paper was evaluated with a ratio of hydraulic power and electric power.

• 대한전자공학회논문지SD
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• 제41권9호
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• pp.85-95
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• 2004

최근 반도체 칩의 집적도가 올라가고 System-on-Chip(Soc)환경이 보편화되면서 Automatic Test Equipment(ATE)를 이용한 테스트 수행시 테스트 패턴의 크기 문제와 스캔체인에서의 전력 소모문제가 크게 부각되고 있다. 또한, 테스트 패턴 크기문제를 해결하기 위해 테스트 패턴을 압축하게 되면 테스트 패턴의 소모하는 전력량이 커지게 되어 저전력 테스트를 수행하는데 어려움이 있어 두 가지 문제를 해결할 수 없었다 본 논문에서는 이러한 문제점들을 동시에 해결하기 위해서 Run-length code를 기반으로 하여 저전력 테스트가 가능하면서 테스트 패턴의 크기도 줄일 수 있는 알고리즘을 제안하였다. 본 논문에서는 기존에 제시되었던 알고리즘과 비교ㆍ분석하는 실험을 통하여 이 알고리즘의 효율성을 보여주고 있다.

• 디지털산업정보학회논문지
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• 제12권3호
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• pp.231-257
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• 2016

Several efforts to replace the use of existing fossil energy resources have already been made around the world. As a result, a new industry of renewable energy has been created, and efficient energy distribution and storage has been promoted intensively. Among the newly explored renewable energy sources, the most widely used one is solar energy generation, which has a high market potential. An energy storage system (ESS) is a system as required. In this paper, the design and implementation of an ESS for the efficient use of power in stand-alone street lights is presented. In current ESS applied to stand-alone street lights, either 12V~24V DC (from solar power) or 110V~220V AC (from commercial power) is used to recharge power in systems with lithium batteries. In this study, an ESS that can support both solar power and commercial power was designed and implemented; it can also perform emergency recharge of portable devices from solar powered street lights. This system can maximize the scalability of ESSes using lithium batteries with efficient energy conversion, with the advantage of being an eco-friendly technology. In a ripple effect, it can also be applied to smart grids, electric vehicles, and new, renewable storage markets where energy storage technology is required.

• 한국통신학회논문지
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• 제31권4A호
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• pp.393-401
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• 2006

배터리로 동작하는 휴대용 임베디드 시스템에서 에너지 소모는 중요한 설계 파라미터이며, 동적 전력 관리는 잘 알려진 저전력 설계 기법중의 하나이다. 본 논문에서는 실시간 시스템에서 에너지를 고려한 태스크 스케줄링 알고리듬을 제안한다. 제안한 스케줄링 알고리듬은 시스템에 여유 시간이 존재할 경우 장치 중첩도가 높은 태스크가 우선적으로 수행되도록 스케줄링 하여 장치의 전력 상태 전환 횟수를 줄여준다. 전력 상태 전환 횟수가 줄어들 경우 상태 전환에 따른 전력 소모가 감소하고, 동적 전력 관리의 기회를 더욱 얻을 수 있다. 실험 결과 EDF 알고리듬으로 동작 하는 시스템에서 동적 전력 관리를 한 경우와 비교하였을 때 에너지 소모가 약 23% 감소하였다.