• Journal of Power Electronics
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• 제18권5호
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• pp.1489-1500
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• 2018

Partial shading analysis of large-scale photovoltaic (PV) arrays has recently become a theoretically and numerically challenging issue, and it is necessary for PV system designers. The main contributions of this study are the following: 1) A PSIM-based macro-model was employed because it is remarkably fast, has high precision, and has no convergence issues. 2) Three types of equivalent macro-models were developed for the transformation of a small PV sub-array with uniform irradiance to a new macro-model. 3) On the basis of the proposed new macro-model, a tearing method was established, which can divide a large-scale PV array into several small sub-arrays to significantly improve the efficiency improvement of a simulation. 4) Three platforms, namely, PSIM, PSpice, and MATLAB, were applied to evaluate the proposed tearing method. The proposed models and methods were validated, and the value of this research was highlighted using an actual large-scale PV array with 2420 PV modules. Numerical simulation demonstrated that the tearing method can remarkably improve the simulation efficiency by approximately thousands of times, and the method obtained a precision of nearly 6.5%. It can provide a useful tool to design the optimal configuration of a PV array with a given shading pattern as much as possible.

• JSTS:Journal of Semiconductor Technology and Science
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• 제10권1호
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• pp.11-19
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• 2010

Register transfer level power macromodeling is well known as a promising technique for accurate and efficient power estimation. This paper proposes effective approaches based on the tablebased method for the RTL power macro-modeling. The new parameter SD, which characterizes the distribution of switching activities for each gate in the circuit, is one of the contributions. The new parameter SD has strong correlation with power consumption. We also propose an accurate table reference method considering the circuit characteristics. The table reference method is applicable for every table-based method and outputs more accurate power value. The experimental results show that the combination of the proposed methods reduces max error 30.36% in the best case, comparing conventional methods. The RMS error is also improved 1.70% in the best case.

• 대한설비공학회:학술대회논문집
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• 대한설비공학회 2008년도 동계학술발표대회 논문집
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• pp.584-589
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• 2008

It is known that slab thermal storage which uses concrete slab as thermal material is effective in the load leveling and using the nighttime electric power. The temperature distribution is not constant in plenum in thermal storage time by beams, ducts such as several factor. It is considered that this fact will effect on efficiency of thermal storage and indoor thermal environment. The purpose of this paper is to examine the thermal environment inside plenum. A macro model was made for the analysis of indoor thermal environment as the first step. The flow rate distribution and temperature distribution of object room model was examined by use of basic equations such as airflow by the pressure difference between unit cells, heat flow by air and heat transfer.

• 대한전기학회논문지:전력기술부문A
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• 제48권10호
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• pp.1317-1326
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• 1999

As the integration ratio and operation speed increase, it has become an important problem to estimate the dissipated power during the design procedure as a method to reduce the TTM(time to market). This paper proposed a prediction model to estimate the maximum dissipated power of a CMOS logic gate. This model uses a calculational method. It was formed by including the characteristics of MOSFETs of which a CMOS gate consists, the operational characteristics of the gate, and the characteristics of the input signals. As the modeling process, a maximum power estimation model for CMOS inverter was formed first, and then a conversion model to convert a multiple input CMOS gate into a corresponding CMOS inverter was proposed. Finally, the power model for inverter was applied to the converted result so that the model could be applied to a general CMOS gate. For experiment, several CMOS gates were designed in layout level by $0.6{\mu}m$ layout design rule. The result by comparing the calculated results with those from HSPICE simulations for the gates showed that the gate conversion model has within 5% of the relative error rate to the SPICE and the maximum power estimation model has within 10% of the relative error rate. Thus, the proposed models have sufficient accuracies. Also in calculation time, the proposed models was more than 30 times faster than SPICE simulation. Consequently, it can be said that the proposed model could be used efficiently to estimate the maximum dissipated power of a CMOS logic gate during the design procedure.

• Journal of the Korean Data and Information Science Society
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• 제26권6호
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• pp.1207-1216
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• 2015

본 연구는 기업신용평가모형 중 재무모형을 개발하는데 있어 여러 조건들의 기준값을 변화시킴에 따라 모형 성능이 어떻게 달라지는지 확인하고 자료의 특성에 맞는 조건을 제안하는데 목적이 있다. 기준값의 변화에 따른 모형의 성능은 정확도비를 기준으로 측정하고, 반복적인 절차를 간편하게 하기 위해 SAS/MACRO를 활용하였다. 재무비율을 구간에 따라 점수화한 신용평점모형과 유의한 재무비율로 로지스틱 회귀모형을 사용한 부실예측모형으로 구성되는 재무모형에서 기준값의 변화에 따른 성능 비교 결과, 부실예측모형이 신용평점모형보다 좋은 것으로 나타났다. 기업규모에 따른 특성비교에서는 재무제표의 신뢰도가 높고 비재무적인 요소에 영향을 적게 받는 대규모 기업에서 모형의 성능이 좋을 뿐만 아니라 재정학적인 의미가 뛰어난 통계모형이 만들어지는 것을 확인할 수 있었다. 규모가 작아질수록 부실예측모형과 신용평점모형의 성능 차이가 커지는 것과 이상값이 많아져서 모형의 안정성이 떨어지는 것을 알 수 있었다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1993년도 하계학술대회 논문집 B
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• pp.781-783
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• 1993

The GTO model is based on the Ebers-Moll equation extened to include the three-junction devices and a detailed description of the implementation of the model equation as well as defferent tests are discussed. Problems to be considered for the snubber design, such as voltage spike reduction, maximum GTO anode current, and switching power, were discussed using the calculation model. The macro model is very useful for simulation of GTO circuit and high power circuit switch in high frequency and complex structure.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 C
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• pp.1164-1166
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• 1999

This paper presents Static Synchronous Series Compensator(SSSC) model for power flow study using IPLAN. In the proposed model, SSSC is represented by the equivalent load variation. The equivalent load consists of active power load specified by user and reactive power load which is founded for considering characteristic of SSSC. And this is implemented by IPLAN which is a macro-external program for PSS/E. Using this model, SSSC can be solved in load-flow by just calling the model in PSS/E. The proposed model was applied to a realistic power system for validity test.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1997년도 전력전자학술대회 논문집
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• pp.148-151
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• 1997

Pspice is not offered a library of mechanical factor like DC Motor, Induction Motor which is needed in Power Electronics field. Therefore, Induction Motor was made library by Equibalent circuit in this study. This model is applied in Voltage-Type inverter and is investigated its characteristics. IGBT is tested by two methods of Macro and Micro Modeling as semiconductor. PWM signal is used of pulse signal. Voltage and current, speed was simulated for assurance of model.

• 대한전자공학회논문지SD
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• 제47권12호
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• pp.55-67
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• 2010

고다층 배선 기판에 형성된 개방 스터브(open stub)를 제거한 후면드릴가공홀(Back-Drilled-Hole, BDH)과 일반적인 구조인 관통홀(Plated-Through-Hole, PTH) 구조의 전기적 특성에 대한 분석을 하였으며, 고속 선호를 부품 실장면으로부터 내층의 스트립라인으로 전송하기 위해 비아홀의 급전 길이가 가장 긴 전송층을 선택하였다. 10 GHz의 광대역 주파수 내에서 실험계획법(DOE, design of experiment)을 적용하여 비아홀 구조 내에 외층과 급전층 사이의 비아홀의 길이, 접지층에 형성된 천공(anti-pad)의 크기와 급전층에 형성된 패드 (pad)의 크기가 최대 반사 손실 반전력 주파수와 삽입 손실에 미치는 영향을 분석하였다. 이로 부터 거시적 모델(macro model)을 위한 회귀 실험식을 추출하여 실험 결과와 비교 평가하였고, 실험 영역 외에서도 측정 결과와 5% 이내의 오차를 보이고 있음을 확인하였다.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제13권5호
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• pp.2243-2257
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• 2019

A heterogeneous cellular network (HCN) is useful to increase the spectral and energy efficiency of wireless networks and to reduce the traffic load from the macro cell. The performance of the secondary user equipment (SUE) is affected by interference from the eNodeB (eNB) in a macro cell. To decrease the interference between the macro cell and the small cell, allocating resources properly is essential to an HCN. This study considers the scenario of a software-defined heterogeneous cellular network and performs the resource allocation process. First, we show the system model of HCN and formulate the optimization problem. The optimization problem is a complex process including power and frequency resource allocation, which imposes an extremely high complexity to the HCN. Therefore, a hierarchical resource allocation scheme is proposed, which including subchannel selection and a particle swarm optimization (PSO)-based power allocation algorithm. Simulation results show that the proposed hierarchical scheme is effective in improving the system capacity and energy efficiency.