• 조명전기설비학회논문지
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• 제17권1호
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• pp.1-9
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• 2003

본 논문에서는 고역률의 단일전력단을 갖는 형광등용 전자식 안정기를 제안하고 설계ㆍ제작하였다. 저가의 새로운 형태를 갖는 고역률 단일전력단 형광등용 전자식 안정기는 부스터 컨버터와U형 고주파 공진 인버터로 구성되어진다. 그러나, 기존의 안정기와는 달리 제안된 안정기는 브리지 다이오드를 제거하고 간단한 제어회로로 구성함으로 간단한 구조를 갖는다. 부스터 컨버터는 상용전원의 정(＋), 부(－)전압에서 각각 동작하고 불연속 모드에서 동작함으로 높은 역률을 얻을 수 있다. 63.5〔W〕의 출력을 갖는 안정기를 제작하여 실험한 결과, PF 0.99, THD 15.4%, CF 1.55의 우수한 결과를 얻을 수 있었다.

• 전력전자학회논문지
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• 제4권6호
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• pp.515-522
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• 1999

형광등용 전자식 안정기의 개발에 있어서, 최근 선전류 고조파 성분의 제한에 관한 여러 가지 규제를 만족시키기 위해 역률 개선 회로를 부가하는 것이 권장되고 있다. 일반적으로는 부스트 컨버터를 가장 많이 사용하고 있지만 전체 제품의 가격 상승 및 EMI 발생 등의 단점 때문에 설계에 있어서 상당한 제약을 받게 된다. 본 논문에서는 역률 개선을 수동소자로만 이용하여 전압원 및 전류원 방식의 공진형 인버터를 채택하는 형광등용 전자식 안정기를 저가격화, 고역률화하는 것을 목적으로 한다.

• 한국마린엔지니어링학회:학술대회논문집
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• 한국마린엔지니어링학회 2005년도 후기학술대회논문집
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• pp.252-253
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• 2005

This paper describes a improvement of power control characteristics of ship's emergency lighting power supply(SELPS), that power factor(PF) is improved and electric power is controlled extensively, and power ON-OFF is controlled and system parameter monitored in remote distance by PC serial communication.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 F
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• pp.2795-2797
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• 1999

Several power factor correction(PFC) circuits are presented to achieve high PF electronic ballast for both voltage-fed and current-fed electronic ballast. The proposed PFC circuits use valley-fill(VF) type DC-link stages modified from the conventional VF circuit to adopt the charge pumping method for PFC operations during the valley intervals. In voltage-fed ballast, charge pump capacitors are connected with the resonant capacitors. In current-fed type, the charge pump capacitors are connected with the additional secondary-side of the power transformer. The measured PF and THD are higher than 0.99 and 15% for all proposed PFC circuits. The lamp current CF is also acceptable in the proposed circuits. The proposed circuit is suitable for implementing cost-effective electronic ballast.

• Journal of Power Electronics
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• 제14권2호
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• pp.226-236
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• 2014

A new active LED driver with high power factor (PF) and low total harmonic distortion (THD) compatible with a rapid-start ballast is proposed. An LC input filter is attached to the ballast to increase PF and reduce THD. A boost converter is then installed to regulate the LED current, where an unstable operating region has been newly identified. The unstable region is successfully stabilized by feedback control with two zeroes. The extremely high overall system of the 10th order is completely analyzed by the newly introduced phasor transformed circuits in static and dynamic analyses. Although a small DC capacitor is utilized, the flicker percentage of the LED is drastically mitigated to 1% by the fast controller. The proposed LED driver that employs a simple controller with a start-up circuit is verified by extensive experiments whose results are in good agreement with the design.

• 전력전자학회논문지
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• 제19권2호
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• pp.173-183
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• 2014

In this paper, an analysis of power losses for the three-level T-type and neutral-point clamped (NPC) PWM inverters is presented, in which the conduction and switching losses of semiconductor devices of the inverters are taken into account. In the inverter operation, the conduction loss depends on the modulation index (MI) and power factor (PF), whereas the switching loss depends on the switching frequency. Power losses for the T-type and NPC inverters are analyzed and calculated at the different operating points of MI, PF and the switching frequency, in which the four different models of semiconductor devices are adopted. In the case of lower MI, the NPC-type is more efficient than the T-type, and vice versa. The validity of the power loss analysis has been verified by the simulation results.

• Journal of Power Electronics
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• 제18권2호
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• pp.323-331
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• 2018

Buck power factor correction (PFC) converters, compared with conventional boost PFC converters, exhibit high efficiency performance in the entire range of universal line voltage. This feature has gotten more attention for eliminating the zero crossing dead angle of buck PFC rectifiers. Furthermore, bridgeless structures for the reduction of conduction losses have been proposed. The aim of this paper is to introduce a single-phase buck rectifier that simultaneously has unity power factor (PF) and bridgeless structure while operating in the continuous conduction mode (CCM). For this purpose, two auxiliary flyback converters without any active switches are applied to a bridgeless buck rectifier to eliminate the zero crossing dead angle and achieve unity power factor, low total harmonic distortion (THD) and high efficiency. The operation and design considerations of the proposed rectifier are verified on a 150W, 48V prototype using a conventional peak-current-mode control. The measurement results show that the proposed rectifier has nearly unity power factor, THD less than 7% and high efficiency.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1997년도 하계학술대회 논문집 F
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• pp.2002-2006
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• 1997

A new PF correction topology, Improved Valley Fill (IVF) with Valley Boost Converter (VBC) used in the electronic ballast for fluorescent lamp is presented. The IVF can adjust the valley voltage higher than half the peak line voltage. Hence, there is no pulsating line current around the line voltage peak, PF and THD are significantly improved. The VBC is added to the IVF to achieve unity PF and to increase the valley voltage. The measured PF and THD for a prototype electronic ballast are 0.997 and 5%, respectively, and the lamp current CF is as low as 1.5

• 전력전자학회논문지
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• 제26권4호
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• pp.302-305
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• 2021

Selection of the optimal inductance for power factor improvement of a buck AC/DC light-emitting diode (LED) driver with wide input voltage range is described in this study. The power factor change based on the slope compensation is obtained for various normalized output current (NOC) values using discrete-time domain analysis. The possibility of implementing constant slope compensation is described using power factor curves for various NOC values. NOC = 0.5 is chosen for the value of inductance with consideration for the simple implementation and reduction of inductor size. Experimental results of the inductance corresponding to NOC = 0.5 are presented.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2000년도 전력전자학술대회 논문집
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• pp.150-154
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• 2000

This paper proposes PFC boost converter with soft switching for harmonics decrement and analyzes characteristics of PFC boost converter. In this technique power factor correction(PFC) is usually obtained by operating the PFC stage in the discontinuous current mode(DCM) Switching devices are operated for reducing current stress and electronical noise. As a result eliminate 3rd harmonic component and high power factor(PF) of the input line are verified by characteristics analysis and experimental results.