• Title/Summary/Keyword: power electronics

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A Signal Anti-reduction System for Power Line Communication

  • Ko Jong-Sun;Kim Hyun-Sik;Hong Soon-Chan
    • Journal of Power Electronics
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    • v.4 no.4
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    • pp.256-260
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    • 2004
  • A new communication system is suggested using a single-phase full-bridge inverter with high efficiency ferrite core for power line communication (PLC). The conventional system has a decreasing signal voltage problem due to internal resistance. The proposed system has almost zero internal impedance and replaces a linear amplifier.

Power-based Side-Channel Analysis Against AES Implementations: Evaluation and Comparison

  • Benhadjyoussef, Noura;Karmani, Mouna;Machhout, Mohsen
    • International Journal of Computer Science & Network Security
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    • v.21 no.4
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    • pp.264-271
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    • 2021
  • From an information security perspective, protecting sensitive data requires utilizing algorithms which resist theoretical attacks. However, treating an algorithm in a purely mathematical fashion or in other words abstracting away from its physical (hardware or software) implementation opens the door to various real-world security threats. In the modern age of electronics, cryptanalysis attempts to reveal secret information based on cryptosystem physical properties, rather than exploiting the theoretical weaknesses in the implemented cryptographic algorithm. The correlation power attack (CPA) is a Side-Channel Analysis attack used to reveal sensitive information based on the power leakages of a device. In this paper, we present a power Hacking technique to demonstrate how a power analysis can be exploited to reveal the secret information in AES crypto-core. In the proposed case study, we explain the main techniques that can break the security of the considered crypto-core by using CPA attack. Using two cryptographic devices, FPGA and 8051 microcontrollers, the experimental attack procedure shows that the AES hardware implementation has better resistance against power attack compared to the software one. On the other hand, we remark that the efficiency of CPA attack depends statistically on the implementation and the power model used for the power prediction.

DSP-Based Direct Source Current Control for Three-Phase Four-Wire Power Coditioner

  • Jeong, C.Y.;Cho, J.G.;Baek, J.W.;Yoo, D.W.;Song, E.H.
    • Proceedings of the KIPE Conference
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    • 1998.10a
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    • pp.871-875
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    • 1998
  • A DSP-based source current control for power conditioner is presented to compensate current harmonics and asymmetries of three-phase four-wire emergency generators caused by nonlinear and/or unbalanced loads. There-phase voltage type converter with split-dc-capacitor is adopted as the power circuit and a new direct source current control method is suggested, which simplifies the controller. The proposed control method shapes the generator current sinusoidally inphase with the voltage and allows the generator to supply maximum power even to single phase loads. An IGBT base lookVA prototype with the controller realized with a DSP (TMS320C32) is built and tested to verify the performance of the power conditioner.

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Smoothing Output Power Variations of Isolated Utility Connected Multiple PV Systems by Coordinated Control

  • Datta, Manoj;Senjyu, Tomonobu;Yona, Atsushi;Sekine, Hideomi;Funabashi, Toshihisa
    • Journal of Power Electronics
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    • v.9 no.2
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    • pp.320-333
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    • 2009
  • A Photovoltaic (PV) system's power output varies with the change of climate. Frequency deviations, tie line voltage swings are caused by the varying PV power when large PV power from several PV systems is fed in the utility. In this paper, to overcome these problems, a simple coordinated control method for smoothing the variations of combined PV power from multiple PV systems is proposed. Here, output power command is formed in two steps: central and local. Fuzzy control is used to produce the central smoothing output power command considering insolation, variance of insolation and absolute average of frequency deviation. In local step, a simple coordination is kept between the central power command and the local power commands by producing a common tuning factor. Power converters are used to achieve the same output power as local command power employing PI control law for each of the PV generation systems. The proposed method is compared with the method where conventional Maximum Power Point Tracking (MPPT) control is used for each of the PV systems. Simulation results show that the proposed method is effective for smoothing the output power variations and feasible to reduce the frequency deviations of the power utility.

Installation of 50MVA STATCOMs in Jeju Power System (제주 50MVA STATCOM 설치 효과 분석)

  • Han, Young-Seong;Chung, Chung-Choo;Park, Jung-Soo;Yeo, Sang-Min;Song, Ji-Young;Suh, In-Young
    • Proceedings of the KIPE Conference
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    • 2010.07a
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    • pp.328-329
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    • 2010
  • STATCOM은 전력전자 기반의 전압형 인버터를 이용한 무효 전력 보상장치로써 우수한 전압 제어 능력과 빠른 동작 특성, 그리고 운용 및 유지/관리의 유연성으로 인해 기존에 사용되던 무효 전력 보상장치들을 빠르게 대체하고 있다. 효성중공업에서는 국내 최초로 100MVA STATCOM을 개발하여 한전 실 계통에 설치/운용한 바 있고 이 경험을 바탕으로 최근 논의되고 있는 제주 50MVA STATCOM의 개발에 착수하였다. 본 논문에서는 이 프로젝트와 관련된 배경을 설명하고 연구 과정 중에 수행된 제주 전력 계통의 STATCOM 설치 효과 모의 결과에 대해서 소개하고자 한다.

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A layer-wise frequency scaling for a neural processing unit

  • Chung, Jaehoon;Kim, HyunMi;Shin, Kyoungseon;Lyuh, Chun-Gi;Cho, Yong Cheol Peter;Han, Jinho;Kwon, Youngsu;Gong, Young-Ho;Chung, Sung Woo
    • ETRI Journal
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    • v.44 no.5
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    • pp.849-858
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    • 2022
  • Dynamic voltage frequency scaling (DVFS) has been widely adopted for runtime power management of various processing units. In the case of neural processing units (NPUs), power management of neural network applications is required to adjust the frequency and voltage every layer to consider the power behavior and performance of each layer. Unfortunately, DVFS is inappropriate for layer-wise run-time power management of NPUs due to the long latency of voltage scaling compared with each layer execution time. Because the frequency scaling is fast enough to keep up with each layer, we propose a layerwise dynamic frequency scaling (DFS) technique for an NPU. Our proposed DFS exploits the highest frequency under the power limit of an NPU for each layer. To determine the highest allowable frequency, we build a power model to predict the power consumption of an NPU based on a real measurement on the fabricated NPU. Our evaluation results show that our proposed DFS improves frame per second (FPS) by 33% and saves energy by 14% on average, compared with DVFS.

Low Cost High Power Density Photovoltaic Power Conditioning System with an Energy Storage System

  • Jang, Du-Hee;Han, Sang-Kyoo
    • Journal of Power Electronics
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    • v.12 no.3
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    • pp.487-494
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    • 2012
  • A new low cost high power density photovoltaic power conditioning system (PV PCS) with an energy storage system is proposed in this paper. Its high power density and cost effectiveness can be achieved through the unification of the maximum power point tracker and the battery charger/discharger. Despite the reduced power stage, the proposed system can achieve the same performance in terms of maximum power point tracking and battery charging/discharging as the conventional system. When a utility power failure happens, the proposed system cannot perform maximum power point tracking at the UPS mode. However, the predetermined battery voltage near the maximum power point of the PV array can effectively generate a reasonable PV power even at the UPS mode. Therefore, it features a simpler structure, less mass, lower cost, and fewer devices. Finally, to confirm the operation, validity, and features of the proposed system, a theoretical analysis and experimental results from a single phase AC 220Vrms/1.5kW prototype are presented.

Introduction to Industrial Applications of Low Power Design Methodologies

  • Kim, Hyung-Ock;Lee, Bong-Hyun;Choi, Jung-Yon;Won, Hyo-Sig;Choi, Kyu-Myung;Kim, Hyun-Woo;Lee, Seung-Chul;Hwang, Seung-Ho
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.9 no.4
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    • pp.240-248
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    • 2009
  • Moore's law has driven silicon technology scale down aggressively, and it results in significant increase of leakage current on nano-meter scale CMOS. Especially, in mobile devices, leakage current has been one of designers' main concerns, and thus many studies have introduced low power methodologies. However, there are few studies to minimize implementation cost in the mixed use of the methodologies to the best of our knowledge. In this paper, we introduce industrial applications of low power design methodologies for the decrease of leakage current. We focus on the design cost reduction of power gating and reverse body bias when used together. Also, we present voltage scale as an alternative to reverse body bias. To sustain gate leakage current, we discuss the adoption of high-$\kappa$ metal gate, which cuts gate leakage current by a factor of 10 in 32 nm CMOS technology. A 45 nm mobile SoC is shown as the case study of the mixed use of low power methodologies.

New Circuit Topology of Single-Ended Soft-Switching PWM High Frequency Inverter and Its Performance Evaluations

  • Deguchi Y.;Moisseev S.;Nakaoka M.;Hirota I.;Yamashita H.;Omori H.;Terai H.
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.247-250
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    • 2001
  • This paper presents a simple and cost effective circuit topology of single-ended type high frequency quasi-resonant PWM inverter using IGBTs, which can operate under wide soft switching operation range based on ZCS for main power switch as compared with a conventional active voltage-clamped ZVS-PWM high frequency quasi-resonant inverter developed previously. In principle, this new circuit topology can efficiently operate under a constant frequency PWM control-based power regulation scheme. In particular, it is noted that the zero current soft switching (ZCS) commutation can achieve for the main active power switch. On the other hand, the zero voltage soft switching (ZVS) commutation can also achieve for the auxiliary active power switch. The operating principle of this high-frequency Inverter treated here and its power regulation characteristics are illustrated on the basis of the simulation and feasible experimental results.

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Low Power Smart Sensing Algorithm based on Context Aware (상황인지 기반 스마트 저전력 센싱 기술)

  • Kim, Seong-Joong;Park, Woo-Chool;Seo, Hae-Moon;Park, Man-Kyu
    • Proceedings of the Korea Information Processing Society Conference
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    • 2011.11a
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    • pp.44-47
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    • 2011
  • In this paper, we propose context-aware based on Low Power Sensing Algorithm. The proposed sensing algorithm reduces power consumptions using low-power sensing algorithms and low-power sensing protocols. Experimental results show that the average power consumption of the proposed method is up to half consumption that of the conventional method.