• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.2
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• pp.269-275
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• 2003

Polysilicon-oxide-nitride-oxide-silicon(SONOS) transistors were fabricated by using 0.35${\mu}{\textrm}{m}$ complementary metal-oxide-semiconductor(CMOS) process technology to realize a low voltage programmable flash memory. The thickness of the tunnel oxide, the nitride, and the blocking oxide were 2.4nm, 4.0nm, and 2.5nm, respectively, and the cell area of the SONOS memory was 1.32$\mu$$m^2$. The SONOS device revealed a maximum memory window of 1.76V with a switching time of 50ms at 10V programming, as a result of the scaling effect of the nitride. In spite of scaling of nitride thickness, memory window of 0.5V was maintained at the end of 10 years, and the endurance level was at least 105 program/erase cycles. Over-erase, which was shown seriously in floating gate device, was not shown in SONOS device.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.2
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• pp.61-67
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• 2006

We fabricate local damascene FinFET cell array in sub-60nm feature sized DRAM. The local damascene structure can remove passing-gate-effects in FinFET cell array. p+ boron in-situ doped polysilicon is chosen for the gate material, and we obtain a uniform distribution of threshold voltages at around 0.7V. Sub-threshold swing of 75mV/d and extrapolated off-state leakage current of 0.03fA are obtained, which are much suppressed values against those of recessed channel array transistors. We also obtain a few times higher on-state current. Based on the improved on- and off-state current characteristics, we expect that the FinFET cell array could be a new mainstream structure in sub-60nm DRAM devices, satisfying high density, low power, and high-speed device requirements.

• Proceedings of the KIEE Conference
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• 1996.07c
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• pp.1968-1970
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• 1996

We investigate a surface-micromachined polysilicon microgyroscope, whose resonant frequencies are electrostatically-tunable after fabrication. The microgyroscope with two oscillation nudes has been designed so that the resonant frequency in the sensing mode is higher than that in the actuating mode. The microgyroscope has been fabricated by a 4-mask surface-micrormachining process, including the deep RIE of a $6{\mu}m$-thick LPCVD polycrystalline silicon layer. The resonant frequency in the sensing mode has been lowered to that in actuating mode through the adjustment of an inter-plate bias voltage; thereby achieving a frequency matching at 5.8kHz under the bias voltage of 2V in a reduced pressure of 0.1torr. For an input angular rate of $50^{\circ}/sec$, an output signal of 20mV has been measured from the tuned microgyroscope under an AC drive voltage of 2V with a DC bias voltage of 3V.

• Korean Journal of Materials Research
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• v.8 no.11
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• pp.1067-1073
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• 1998

High quality diamond films of the silicon on diamond (SOD) structure are deposited using CO and $H_2$ gas mixture in microwave plasma chemical vapor deposition (CVD), a SOD structure is fabricated using low pressure CVD polysilicon on diamond/ Si(100) substrate. The crystalline structure of the diamond films which composed of { 111} and {100} planes. were changed from octahedral one to cubo-octahedron one as the CO/$H_2$ ratios are increased. The high quality diamond films without amorphous carbon and non-diamond elements were deposited at the CO/$H_2$ flow rate of 0.18. and the main phase of the diamond films shows (111) plane. The diamond/Si(lOO) structure shows that the interface is flat without voids. The measured dielectric constant. leakage current and breakdown field were $5.31\times10^{-9}A/cm^2$ and $9\times{10^7}{\Omega}cm$ respectively.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.05a
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• pp.105-110
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• 2008

We have proposed a new structure of poly-silicon thin film transistor(TFT) which was fabricated the LDD region using doping oxide with graded spacer by etching shape retio. The devices of n-channel poly-si TFT's hydrogenated by $H_2$ and $HT_2$/plasma processes are fabricated for the devices reliability. We have biased the devices under the gate voltage stress conditions of maximum leakage current. The parametric characteristics caused by gate voltage stress conditions in hydrogenated devices are investigated by measuring /analyzing the drain current, leakage current, threshold voltage($V_{th}$), sub-threshold slope(S) and transconductance($G_m$) values. As a analyzed results of characteristics parameters, the degradation characteristics in hydrogenated n-channel polysilicon TFT's are mainly caused by the enhancement of dangling bonds at the poly-Si/$SiO_2$ interface and the poly-Si Brain boundary due to dissolution of Si-H bonds. The structure of novel proposed poly-Si TFT's are the simplity of the fabrication process steps and the decrease of leakage current by reduced lateral electric field near the drain region.

• Korean Journal of Materials Research
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• v.8 no.7
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• pp.634-640
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• 1998

A well- shaped trench was investigated in view of the defect distribution along trench sidewall and bottom using high resolution transmission electron microscopy. The trench was formed by HBr plasma and additive gases in magnetically enhanced reactive ion etching system. Adding $0_2$ and other additive gases into HBr plasma makes it possible to eliminate sidewall undercut and lower surface roughness by forming the passivation layer of lateral etching, resulted in the well filled trench with oxide and polysilicon by subsequent deposition. The passivation layer of lateral etching was mainly composed of $SiO_xF_y$ $SiO_xBr_y$ confirmed by chemical analysis. It also affects the generation and distribution of lattice defects. Most of etch induced defects were found in the edge region of the trench bottom within the depth of 10$\AA$. They are generally decreased with the thickness of residue layer and almost disappeared below the uni¬formly thick residue layer. While the formation of crystalline defects in silicon substrate mainly depends on the incident angle and energy of etch species, the region of surface defects on the thickness of residue layer formed during trench etching.

• Journal of Sensor Science and Technology
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• v.10 no.5
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• pp.292-303
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• 2001

This work reports the tunneling effects of the lateral field emitters. Tunneling effect is applicable to the VMFS(vacuum magnetic field sensors). VMFS uses the fact that the trajectory of the emitted electrons are curved by the magnetic field due to Lorentz force. Polysilicon was used as field emitters and anode materials. Thickness of the emitter and the anode were $2\;{\mu}m$, respectively. PSG(phospho-silicate-glass) was used as a sacrificial layer and it was etched by HF at a releasing step. Cantilevers were doped with $POCl_3(10^{20}cm^{-3})$. $2{\mu}m$-thick cantilevers were fabricated onto PSG($2{\mu}m$-thick). Sublimation drying method was used at releasing step to avoid stiction. Then, device was vacuum sealed. Device was fixed to a sodalime-glass #1 with silver paste and it was wire bonded. Glass #1 has a predefined hole and a sputtered silicon-film at backside. The front-side of the device was sealed with sodalime-glass #2 using the glass frit. After getter insertion via the hole, backside of the glass #1 was bonded electrostatically with the sodalime-glass #3 at $10^{-6}\;torr$. After sealing, getter was activated. Sealing was successful to operate the tunneling device. The packaged VMFS showed very small reduced emission current compared with the chamber test prior to sealing. The emission currents were changed when the magnetic field was induced. The sensitivity of the device was about 3%/T at about 1 Tesla magnetic field.