• 제목/요약/키워드: polycrystalline Si

검색결과 462건 처리시간 0.027초

Improvement in Electrical Stability of poly-Si TFT Employing Vertical a-Si Offsets

  • Park, J.W.;Park, K.C.;Han, M.K.
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2000년도 제1회 학술대회 논문집
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    • pp.67-68
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    • 2000
  • Polycrystalline silicon (poly-Si) thin film transistors (TFT's) employing vertical amorphous silicon (a-Si) offsets have been fabricated without additional photolithography processes. The a-Si offset has been formed utilizing the poly-Si grain growth blocking effect by thin native oxide film during the excimer laser recrystallization of a-Si. The ON current degradation of the new device after 4 hour's electrical stress was reduced by 5 times compared with conventional poly-Si TFT's.

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폴리머 위에 엑시머 레이저 방법으로 결정화된 다결정 실리콘의 특성 (Characteristics of Excimer Laser-Annealed Polycrystalline Silicon on Polymer layers)

  • 김경보;이종필;김무진;민영실
    • 융합정보논문지
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    • 제9권3호
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    • pp.75-81
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    • 2019
  • 본 논문은 유기물로 이루어진 폴리머 기판상에 저온 다결정 실리콘 박막트랜지스터 제조방법에 대해 연구하였다. 먼저, 폴리머 기판에 화학증착방식으로 비결정 실리콘 박막을 증착하였고, 열처리 장치인 퍼니스로 탈수소 및 활성화 공정을 430도에서 2시간동안 진행하였다. 이후 엑시머 레이저를 이용하여 결정화를 진행하여 다결정 실리콘 반도체 막을 제조하였다. 이 박막은 박막트랜지스터 제작을 위한 활성층으로 사용하였다. 제작된 p형 박막트랜지스터는 이동도 $77cm^2/V{\cdot}s$, on/off 전류비는 $10^7$이상의 동작특성을 보였고, 이는 결정화된 박막내부에 결함 농도가 낮음을 의미한다. 이 결과로 유기물 기판상에 엑시머 레이저로 형성된 다결정 실리콘으로 제작된 전자소자는 플렉서블 AMOLED 디스플레이 회로 형성에 최적의 기술임을 알 수 있다.

도핑 농도에 따른 다결정 3C-SiC 박막의 기계적 특성 (Mechanical properties of polycrystalline 3C-SiC thin films with various doping concentrations)

  • 이윤명;정귀상
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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    • pp.368-369
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    • 2008
  • This paper describes the mechanical properties of poly(polycrystalline) 3C-SiC thin film with various doping concentration, in which poly 3C-SiC thin film's mechanical properties according to the n-doping concentration 1%$(9.2\times10^{15}cm^{-3})$, 3%$(5.2\times10^{17}cm^{-3})$, and 5%$(6.8\times10^{17}cm^{-3})$ respectively was measured by nano indentation. In the case of $9.2\times10^{15}^{-3}$ n-doping concentration, Young's Modulus and hardness were obtained as 270 GPa and 30 GPa, respectively. When the surface roughness according to n-doping concentrations was investigated by AFM(atomic force microscope), the roughness of poly 3C-SiC thin film doped by 5% concentration was 15 nm, which is also the best of them.

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복합 티타늄실리사이드 공정에서 발생한 공극 생성 연구 (Void Defects in Composite Titanium Disilicide Process)

  • 정성희;송오성
    • 한국재료학회지
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    • 제12권11호
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    • pp.883-888
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    • 2002
  • We investigated the void formation in composite-titanium silicide($TiSi_2$) process. We varied the process conditions of polycrystalline/amorphous silicon substrate, composite $TiSi_2$ deposition temperature, and silicidation annealing temperature. We report that the main reason for void formation is the mass transport flux discrepancy of amorphous silicon substrate and titanium in composite layer. Sheet resistance in composite $TiSi_2$ without patterns is mainly affected by silicidation rapid thermal annealing (RTA) temperature. In addition, sheet resistance does not depend on the void defect density. Sheet resistance with sub-0.5 $\mu\textrm{m}$ patterns increase abnormally above $850^{\circ}C$ due to agglomeration. Our results imply that $sub-750^{\circ}C$ annealing is appropriate for sub 0.5 $\mu\textrm{m}$ composite X$sub-750_2$ process.

다결정 실리콘 박막 트랜지스터 제조공정 기술 (Polycrystalline Silicon Thin Film Transistor Fabrication Technology)

  • 이현우;전하응;우상호;김종철;박현섭;오계환
    • 한국진공학회지
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    • 제1권1호
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    • pp.212-222
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    • 1992
  • To use polycrystalline Si Thin Film Transistor (poly-Si TFT) in high density SRAM instead of High Load Resistor (HLR), TFT is needed to show good electrical characteristics such as large carrier mobility, low leakage current, high driver current and low subthreshold swing. To satisfy these electrical characteristics, the trap state density must be reduced in the channel poly. Technological issues pertinent to the channel poly fabrication process are investigated and discussed. They are solid phase growth (SPG), Si-ion implantation, laser annealing and hydrogenation. The electrical properties of several CVD oxides used as the gate oxide of TFT are compared. The dependence of the electrical characteristics of TFT on source-drain ion-implantation dose, drain offset length and dopant lateral diffusion are also described.

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Effect of Alternating Magnetic Field on Ion Activation in Low Temperature Polycrystalline Silicon Technology

  • Hwang, Jin Ha;Lim, Tae Hyung
    • 반도체디스플레이기술학회지
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    • 제3권1호
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    • pp.35-39
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    • 2004
  • Statistical design of experiments was successfully employed to investigate the effect of alternating magnetic field on activation of polycrystalline Si (p-Si) doped as n-type using $\textrm{PH}_3$, by full factorial design of three factors with two levels. In this design, the input variables are graphite size, alternating current, and activation time. The output parameter, sheet resistance, is analyzed in terms of the primary effects and multi-factor interactions. Notably, the three-factor interaction is calculated to be a dominant interaction. The interaction between graphite size and activation time and the main effect of current are important effects compared to the other variables and relevant interactions. Alternating magnetic flux activation is proved a significantly beneficial processing technique.

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박막구조를 가진 폴리실리콘 압저항형 습도센서의 연구 (Study on Piezoresistive Humidity Sensor using Polycrystalline Silicon with Membrane)

  • 박성일;박새광
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1994년도 하계학술대회 논문집 C
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    • pp.1422-1424
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    • 1994
  • This paper deals with piezoresistive humidity sensor using polycrystalline silicon (Poly-Si ) with membrane in sensors of semiconductor. Poly-Si piezoresistors which have no temperature dependancy are deposited on silicon wafer, membrane is formed with micromachining technology, then polyimide is formed as a hygroscopic layer. Whereas the principle of conventional humidify sensors are based on the change in electrical properties of the material, the humidity induced volume change of a polyimide layer leads to a deformation of a silicon membrane in this case. This deformation is transformed into an output voltage by Poly-Si piezoresistive. Wheatstone bridge. Fabricated piezoresistive humidity sensors showed good linearity, response time, and long term stability.

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Low-temperature Epitaxial Growth of a Uniform Polycrystalline Si Film with Large Grains on SiO2 Substrate by Al-assisted Crystal Growth

  • Ahn, Kyung Min;Kang, Seung Mo;Moon, Seon Hong;Kwon, HyukSang;Ahn, Byung Tae
    • Current Photovoltaic Research
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    • 제1권2호
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    • pp.103-108
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    • 2013
  • Epitaxial growth of a high-quality thin Si film is essential for the application to low-cost thin-film Si solar cells. A polycrystalline Si film was grown on a $SiO_2$ substrate at $450^{\circ}C$ by a Al-assisted crystal growth process. For the purpose, a thin Al layer was deposited on the $SiO_2$ substrate for Al-assisted crystal growth. However, the epitaxial growth of Si film resulted in a rough surface with humps. Then, we introduced a thin amorphous Si seed layer on the Al film to minimize the initial roughness of Si film. With the help of the Si seed layer, the surface of the epitaxial Si film was smooth and the crystallinity of the Si film was much improved. The grain size of the $1.5-{\mu}m$-thick Si film was as large as 1 mm. The Al content in the Si film was 3.7% and the hole concentration was estimated to be $3{\times}10^{17}/cm^3$, which was one order of magnitude higher than desirable value for Si base layer. The results suggest that Al-doped Si layer could be use as a seed layer for additional epitaxial growth of intrinsic or boron-doped Si layer because the Al-doped Si layer has large grains.

다결정 실리콘 태양전지 제조를 위한 비정질 알루미늄 유도 결정 입자 특성 (Characteristics of aluminum-induced polycrystalline silicon film for polycrystalline silicon solar cell fabrication)

  • 정혜정;김호성;이호재;부성재
    • 한국신재생에너지학회:학술대회논문집
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    • 한국신재생에너지학회 2010년도 추계학술대회 초록집
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    • pp.49.1-49.1
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    • 2010
  • 본 연구에서는 증착법에 의해 제조된 다결정 실리콘을 이용한 태양전지 제작과 관련하여 다결정 실리콘 씨앗층 제조를 위한 기판에 대하여 연구를 수행하였다. 다결정 실리콘 씨앗층을 제조할 수 있는 기술중 aluminum-induced layer exchange(ALILE) 공정을 이용하여 다결정 실리콘 씨앗층을 제조하였다. glass/Al/oxide/a-Si 구조로 알루미늄과 비정질 실리콘 계면에 알루미늄 산화막을 다양한 두께로 형성시켜, 알루미늄 유도 결정화에서 산화막의 두께가 결정화 특성에 미치는 영향, 결정결함, 결정크기에 대하여 연구하였다. 형성된 다결정 실리콘 씨앗층 막의 특성은 OM, SEM, FIB, EDS, Raman spectroscopy, XRD, EBSD 을 이용하여 분석하였다. 그 결과 산화막의 두께가 증가할수록 결함도 함께 증가하였다. 16nm 두께의 산화막 구조에서 <111> 방향의 우선배향성을 가진, $10{\mu}m$의 sub-grain 결정립을 갖는 씨앗층을 제조 하였다.

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APCVD법으로 증착한 3C-SiC 박막의 라만 산란 특성 (Raman Scattering Characteristics on 3C-SiC Thin Films Deposited by APCVD Method)

  • 정준호;정귀상
    • 한국전기전자재료학회논문지
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    • 제20권7호
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    • pp.606-610
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    • 2007
  • This paper describes the Raman scattering characteristics of polycrystalline (poly) 3C-SiC thin films, in which they were deposited on the oxidized Si substrate by APCVD method according to growth temperature. Since the phonon modes were not measured for $0.4{\mu}m$ thick 3C-SiC, $2.0{\mu}m$ thick 3C-SiC deposited on the oxidized Si at $1180^{\circ}C$, in which TO (transverse optical mode) and LO (longitudinal optical mode) phonon modes were appeared at 794.4 and $965.7cm^{-1}$, respectively. The broad FWHM (full width half maximum) can explain that the crystallinity of 3C-SiC deposited at $1180^{\circ}C$ becomes polycrystalline instead of disorder crystal. Additionally, the ratio of intensity $I_{LO}/I_{TO}{\approx}1.0$ of 3C-SiC indicates that the crystal disorder of $3C-SiC/SiO_2/Si$ is small. Compared poly $3C-SiC/SiO_2$ with $SiO_2/Si$ interfaces, $1122.6cm^{-1}$ phonon mode was measured which may belong to C-O bonding and two phonon modes, 1355.8 and $1596.8cm^{-1}$ related to D and G bands of C-C bonding in the Raman range of 200 to $2000cm^{-1}$.