• Journal of the Institute of Electronics Engineers of Korea SC
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• v.37 no.2
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• pp.69-76
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• 2000

A dual-modulus prescaler divides the input signal by one of the moduli according to the control signal. In this paper, a new fast dual-modulus prescaler is proposed. The proposed prescaler has a ratioed-NOR structure different from a conventional ratioed-NAND structure. The proposed one can operate at a higher speed by using parallely connected NMOSs instead of using series-connected ones. HSPICE simulation results using HYUNDAI 0.65(m 2-poly 2-metal CMOS process parameters show that the maximum operating frequency of the proposed dual-modulus prescaler is 2.8㎓ with power consumption of 40.7㎽ at 5V supply voltage at $25^{\circ}C$. The proposed dual-modulus prescaler can be utilized for the frequency-synthesis in cellular radio front-ends.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.7
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• pp.97-103
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• 2002

In this paper, a Logarithmic Video Amplifier(LVA) for radar system or satellite communications is described. The proposed LVA is composed of a input stage, amplification stage, and output stage. As well as a novel series-parallel architecture is proposed for the purpose of wide dynamic range and high speed operation, a newly developed input stage is designed in order to control the voltage level between LVA and detector diode. The LVA is fabricated with a 1.5um 2-poly 2-metal n-well Bi-CMOS technology, and the chip area is 1310 um x 1540 um. From the experimental results, it consumes 190 mW at 10V power supply, the chip has 60 dB dynamic range and 100ns falling time.

• 전자공학회논문지 IE
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• v.43 no.2
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• pp.11-15
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• 2006

In this paper characteristics of polycrystalline silicon crystallized by excimer laser on plastic substrate under 150$^{\circ}C$ is investigated. Amorphous silicon is deposited by rf-magnetron sputter in atmosphere of Ar and He for preventing depletion effect by dehydrogenation as deposition by PECVD. After annealing by 308 nm, 30 Hz, double pulse type XeCl excimer laser, p-chnnel low temperature polycrystalline silicon TFT which maximum mobility is $64cm^2/V{\cdot}s$ at $344mJ/cm^2$ is fabricate.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.33 no.4
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• pp.337-345
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• 2009

This paper investigates the reliability of district heating pipes at thermo-elastic fatigue loading. District heating pipes, subjected to $120^{\circ}C$ and $16kg_f/cm^2$ due to water distributing service through inside the pipes, should endure long term cyclic thermal-mechanical loadings. The heating pipes are the co-centric tubes of steel pipe, poly urethane(PUR) insulator, and high density poly ethylene(HDPE) case. On installation, foam pad is externally wrapped for accommodating stress reduction near the bend sections of pipes. However, there have been frequent reports on the failures of bend sections in the middle of long term service. This study scrutinizes the observed failures near the bend sections through applying the finite element methods. Specially in this study, heating pipes are studied on the influence of foam padding on failures and proposed new designs for reinforced bend without foam pad.

• Bulletin of the Korean Chemical Society
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• v.31 no.9
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• pp.2618-2626
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• 2010

In this paper poly (4-methyl vinylpyridinium hydroxide)/SBA-15 composite was prepared as a highly efficient heterogeneous basic catalyst by in situ polymerization method for the first time. It was characterized by XRD, FT-IR, BET, TGA, SEM and back titration using NaOH. This catalyst exhibited the excellent catalytic activities for the Knoevenagel condensation of various aldehydes with ethyl cyanoacetate. Over this catalyst, ${\alpha},{\beta}$-unsaturated carbonyl compounds were obtained in the reasonable yield at $95^{\circ}C$ in 10 - 30 min in $H_2O$ as a solvent with a 100% selectivity to the condensation products. Catalyst could be easily recycled after the reaction and it could be reused without the significant loss of activity/selectivity performance. No by-product formation, high yields, short reaction times, mild reaction conditions and operational simplicity with reusability of the catalyst were the salient features of the present synthetic protocol. Presence of $H_2O$ as a solvent was also recognized as a "green method".

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.11
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• pp.57-62
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• 1998

In this paper, tunable transconductor shows good linearity over a wide input voltage range are proposed. The proposed transconductor employ operating in the nonsaturation(ie., linear) region to improve circuit simplicity and tunability and 6.8V$\_$p-p/ wide input range. Also the circuit employ source-coupled differential pair to provide true differential input and can achieve both positive and negative transconductance values. The proposed circuits are implemented using a 1.2 $\mu\textrm{m}$ single poly double metal n-well CMOS technology. The THD characteristic of proposed circuit is less than 1% for a differential input voltage of up to 6V$\^$p-p/ when supply bias condition is V$\_$DD/=-V$\_$ss/=5V, I$\_$B/=20, 40${\mu}$A, and frequency of input signal is 1KHz.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.1
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• pp.67-74
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• 2000

In this paper, a $54{\times}54$-bit multiplier based on a improved conditional sum adder is proposed. To reduce the multiplication time, high compression-rate compressors without Booth's Encoding, and a 108-bit conditional sum adder with separated carry generation block, are developed. Furthermore, a design technique based on pass-transistor logic is utilized for optimize the multiplication time and the power consumption by about 5% compared to that of conventional one. With $0.65{\mu}m$, single-poly, triple-metal CMOS process, its chip size is $6.60{\times}6.69\;mm^2$ and the multiplication time is 135.ns at a 3.3V power supply.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.11a
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• pp.362-363
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• 2005

The objectives of this paper are to achieve good planarization of the deposited film and to improve deposition efficiency of multi-layer structures by using surface-micromaching process in MEMS technology. Planarization characteristic of poly-Si film deposited on thin oxide layer with MEMS structures is evaluated with different slurries. Patterns used for this research have shapes of square, density, line, hole, pillar, and micro engine part. Advantages and disadvantages of CMP for MEMS structures are observed respectively by using the test patterns with structures larger than 1 um line width. Preliminary tests for material selectivity of poly-Si and oxide are conducted with two types of slurries: ILD1300 and Nalco2371. And then, the experiments were conducted based on the pretest.

• Journal of Sensor Science and Technology
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• v.18 no.4
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• pp.311-315
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• 2009

This paper describes the characteristics of a poly 3C-SiC micro heater which was fabricated on AlN(0.1 $\mu$m)/3C-SiC(1.0 $\mu$m) suspended membranes by surface micro-machining technology. The 3C-SiC and AlN thin films which have wide energy band gap and very low lattice mismatch were used sensors for high temperature and voltage environments. The 3C-SiC thin film was used as micro heaters and temperature sensor materials simultaneously. The implemented 3CSiC RTD(resistance of temperature detector) and the power consumption of micro heaters were measured and calculated. The TCR(thermal coefficient of the resistance) of 3C-SiC RTD is about -5200 ppm/$^{\circ}C$ within a temperature range from 25 $^{\circ}C$ to 50 $^{\circ}C$ and -1040 ppm/$^{\circ}C$ at 500 $^{\circ}C$. The micro heater generates the heat about 500 $^{\circ}C$ at 10.3 mW. Moreover, durability of 3C-SiC micro heaters in high voltages is better than Pt micro heaters. A thermal distribution measured and simulated by IR thermovision and COMSOL is uniform on the membrane surface.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.12B
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• pp.1695-1702
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• 2001

This paper describes a design of CMOS infrared (IR) wireless data link IC which can be used in IrDA(Infrared Data Association) application from 4 Mb/s to 100 Mb/s The implemented chip consists of variable gain transimpedance amplifier which has a gain range from 60 dB to 100 dB, AGC (automatic gain control) circuits, AOC(automatic offset control) loop, 4 PPM (pulse position modulation) modulator/demodulator and DLL(delay locked loops). This infrared optical link If was implemented using commercial 0.25 um 1-poly 5-metal CMOS process. The chip consumes 25 mW at 100 Mb/s with 2.5 V supply voltage excluding buffer amplifier. The die area of prototype IC is 1.5 mm $\times$ 1 mm.