• Title/Summary/Keyword: patterning effect

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VIBRATION ANALYSIS OF PCB MANUFACTURING SYSTEM USING MASKLESS EXPOSURE METHOD (Maskless 방식을 이용한 PCB 생산시스템의 진동 해석)

  • Jang, Won-Hyuk;Lee, Jae-Mun;Cho, Myeong-Woo;Kim, Joung-Su;Lee, Chul-Hee
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2009.10a
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    • pp.421-426
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    • 2009
  • This paper presents vibration analysis of maskless exposure module in Printed Circuit Board (PCB) manufacturing system. In order to complete exposure process in PCB, masking type module has been widely used in electronics industries. However, masking process confronts some limitations of application due to higher production cost for masking as well as lower printing resolution. Therefore, maskless exposure module is started to be in the spotlight for flexible production system to meet the needs of fabrication in variable patterns at low cost. Since maskless exposure process adopts direct patterning to PCB, vibration problems become more critical compared to conventional masking type process. Moreover, movements of exposure engine as well as stage generate vibration sources in the system. Thus, it is imperative to analyze the vibration characteristics for the maskless exposure module to improve the quality and accuracy of PCB. In this study, vibration analysis using the Finite Element Analysis is conducted to identify the critical structural parts deteriorating vibration performance. Also, Experimental investigations are conducted by single/dual encoder measurement process under the operating module speed. Measurement points of vibration are selected by three places, which are base of stage, exposure engine and top of stage, to check the effect of vibration from the exposure engine. Comparisons between analysis results and experimental measurement are conducted to confirm the accuracy of analysis results including the developed FE model. Finally, this studies show feasibility of optimal design using the developed FE analysis model.

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Nano-fabrication of Superconducting Electrodes for New Type of LEDs

  • Huh, Jae-Hoon;Endoh, Michiaki;Sato, Hiroyasu;Ito, Saki;Idutsu, Yasuhiro;Suemune, Ikuo
    • Proceedings of the Optical Society of Korea Conference
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    • 2009.02a
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    • pp.133-134
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    • 2009
  • Cold temperature development (CTD) of electron beam (EB) patterned resists and subsequent dry etching were investigated for fabrication of nano-patterned Niobium (Nb). Bulky Nb fims on GaAs substrates were deposited with EB evaporation. Line patterns on Nb cathode were fabricated by EB patterning and reactive ion etching (RIE). Size deviations of nano-sized line patterns from CAD designed patterns are dependent on the EB total exposure, but it can be improved by CTD of EB-exposed resist. Line patterns of 10 to 300 nm widths of EB-exposed resist patterns were drawn under various exposure conditions of $0.2{\mu}s$/dot (total 240,000 dot) with a constant current (50 pA). Compared with room temperature development (RTD), the CTD improves pattern resolution due to the suppression of backscattering effect. RIE with $CF_4$ was performed for formation of several nano-sized line patterns on Nb. Each EB-resist patterned samples with RTDs and CTDs were etched with two different $CF_4$ gas pressures of 5 Pa. Nb etching rate increases while GaAs (or ZEP) etching rate decreases as the chamber pressure increases. This different dependent of the etching rate on the $CF_4$ pressure between Nb and GaAs (or ZEP) has a significant meaning because selective etching of nano-sized Nb line patterns is possible without etching of the underlying active layer.

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Effect of PDMS Blanket Deformation on Printability in Reverse-Offset Printing (리버스 옵셋 인쇄에서 PDMS 블랑켓 변형이 인쇄에 미치는 영향에 관한 연구)

  • Choi, Young-Man;Kim, Kwang-Young;Jo, Jeongdai;Lee, Taik-Min
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.38 no.8
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    • pp.709-714
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    • 2014
  • Reverse-offset printing is one of the technologies that can be used for patterning fine features of the order of a few micrometers for printed electronics. In reverse-offset printing, a coated ink film is transferred to a blanket made of elastomer-like poly-dimethylsiloxane. Then, the blanket is impressed onto a clich$\acute{e}$ that has intaglio patterns. The blanket is deformed by penetrating the intaglio of the clich$\acute{e}$ according to the printing pressure. Excessive deformation of the blanket can cause printing defects upon touching the bottom of the intaglio pattern, especially in large patterns. In this paper, we modelled the deformation of the blanket using the finite element method. Considering the actual printing parameters, a condition for fabricating a clich$\acute{e}$ is proposed to prevent defects by the deformation of the blanket.

Characteristics Analysis Related with Structure and Size of SONOS Flash Memory Device (SONOS 플래시 메모리 소자의 구조와 크기에 따른 특성연구)

  • Yang, Seung-Dong;Oh, Jae-Sub;Park, Jeong-Gyu;Jeong, Kwang-Seok;Kim, Yu-Mi;Yun, Ho-Jin;Choi, Deuk-Sung;Lee, Hee-Deok;Lee, Ga-Won
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.23 no.9
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    • pp.676-680
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    • 2010
  • In this paper, Fin-type silicon-oxide-nitride-oxide-silicon (SONOS) flash memory are fabricated and the electrical characteristics are analyzed. Compared to the planar-type SONOS devices, Fin-type SONOS devices show good short channel effect (SCE) immunity due to the enhanced gate controllability. In memory characteristics such as program/erase speed, endurance and data retention, Fin-type SONOS flash memory are also superior to those of conventional planar-type. In addition, Fin-type SONOS device shows improved SCE immunity in accordance with the decrease of Fin width. This is known to be due to the fully depleted mode operation as the Fin width decreases. In Fin-type, however, the memory characteristic improvement is not shown in narrower Fin width. This is thought to be caused by the Fin structure where the electric field of Fin top can interference with the Fin side electric field and be lowered.

Photocatalytic Activity of Hierarchical N doped TiO2 Nanostructures

  • Naik, Brundabana;Kim, Sun Mi;Jung, Chan Ho;Park, Jeong Young
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.669-669
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    • 2013
  • Hierarchical N doped TiO2 nanostructured catalyst with micro, meso and macro porosity have been synthesized by a facile self-formation route using ammonia and titanium isopropoxide precursor. The samples were calcined in different calcination temperature ranging from $300^{\circ}C$ to $800^{\circ}C$ at slow heating rate ($5^{\circ}C$/min) and designated as NHPT-300 to NHPT-800. $TiO_2$ nanostructured catalyst have been characterized by physico-chemical and spectroscopy methods to explore the structural, electronic and optical properties. UV-Vis diffuse reflectance spectra confirmed the red shift and band gap narrowing due to the doping of N species in TiO2 nanoporous catalyst. Hierarchical macro porosity with fibrous channel patterning was observed (confirmed from FESEM) and well preserved even after calcination at $800^{\circ}C$, indicating the thermal stability. BET results showed that micro and mesoporosity was lost after $500^{\circ}C$ calcination. The photocatalytic activity has been evaluated for methanol oxidation to formaldehyde in visible light. The enhanced photocatalytic activity is attributed to combined synergetic effect of N doping for visible light absorption, micro and mesoporosity for increase of effective surface area and light harvestation, and hierarchical macroporous fibrous structure for multiple reflection and effective charge transfer.

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Direct Transfer Printing of Nanomaterials for Future Flexible Electronics

  • Lee, Tae-Yun
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2011.05a
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    • pp.3.1-3.1
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    • 2011
  • Over the past decade, the major efforts for lowering the cost of electronics has been devoted to increasing the packaging efficiency of the integrated circuits (ICs), which is defined by the ratio of all devices on system-level board compared to the area of the board, and to working on a larger but cheaper substrates. Especially, in flexible electronics, the latter has been the favorable way along with using novel nanomaterials that have excellent mechanical flexibility and electrical properties as active channel materials and conductive films. Here, the tool for achieving large area patterning is by printing methods. Although diverse printing methods have been investigated to produce highly-aligned structures of the nanomaterials with desired patterns, many require laborious processes that need to be further optimized for practical applications, showing a clear limit to the design of the nanomaterial patterns in a large scale assembly. Here, we demonstrate the alignment of highly ordered and dense silicon (Si) NW arrays to anisotropically etched micro-engraved structures using a simple evaporation process. During evaporation, entropic attraction combined with the internal flow of the NW solution induced the alignment of NWs at the corners of pre-defined structures. The assembly characteristics of the NWs were highly dependent on the polarity of the NW solutions. After complete evaporation, the aligned NW arrays were subsequently transferred onto a flexible substrate with 95% selectivity using a direct gravure printing technique. As proof-of-concept, flexible back-gated NW field effect transistors (FETs) were fabricated. The fabricated FETs had an effective hole mobility of 0.17 $cm2/V{\cdot}s$ and an on/off ratio of ${\sim}1.4{\times}104$. These results demonstrate that our NW gravure printing technique is a simple and effective method that can be used to fabricate high-performance flexible electronics based on inorganic materials.

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Dry Etching Characteristics of $YMnO_3$ Thin Films Using Inductively Coupled Plasma (유도결합 플라즈마를 이용한 $YMnO_3$ 박막의 건식 식각 특성 연구)

  • 민병준;김창일;창의구
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.14 no.2
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    • pp.93-98
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    • 2001
  • YMnO$_3$ films are excellent gate dielectric materials of ferroelectric random access memories (FRAMs) with MFSFET (metal -ferroelectric-semiconductor field effect transistor) structure because YMnO$_3$ films can be deposited directly on Si substrate and have a relatively low permittivity. Although the patterning of YMnO$_3$ thin films is the requisite for the fabrication of FRAMs, the etch mechanism of YMnO$_3$ thin films has not been reported. In this study, YMnO$_3$thin films were etched with Cl$_2$/Ar gas chemistries in inductively coupled plasma (ICP). The maximum etch rate of YMnO$_3$ film is 285$\AA$/min under Cl$_2$/(Cl$_2$+Ar) of 1.0, RF power of 600 W, dc-bias voltage of -200V, chamber pressure of 15 mTorr and substrate temperature of $25^{\circ}C$. The selectivities of YMnO$_3$ over CeO$_2$ and $Y_2$O$_3$ are 2.85, 1.72, respectively. The selectivities of YMnO$_3$ over PR and Pt are quite low. Chemical reaction in surface of the etched YMnO$_3$ thin films was investigated with X-ray photoelectron spectroscopy (XPS) surface of the selected YMnO$_3$ thin films was investigated with X-ray photoelectron spectroscopy(XPS) and secondary ion mass spectrometry (SIMS). The etch profile was also investigated by scaning electron microscopy(SEM)

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Changes of dielectric surface state In organic TFTs on flexible substrate (유연한 기판상의 유기 트랜지스터의 절연 표면층 상태 변화에 의한 전기적 특성 향상)

  • Kim, Jong-Moo;Lee, Joo-Woo;Kim, Young-Min;Park, Jung-Soo;Kim, Jae-Gyeong;Jang, Jin;Oh, Myung-Hwan;Ju, Byeong-Kwon
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.05a
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    • pp.86-89
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    • 2004
  • Organic thin film transistors (OTFTs) are fabricated on the plastic substrate through 4-level mask process without photolithographic patterning to yield the simple fabrication process. And we herewith report for the effect of dielectric surface modification on the electrical characteristics of OTFTs. The KIST-JM-1 as an organic molecule for the surface modification is deposited onto the surface of zirconium oxide $(ZrO_2)$ gate dielectric layer. In this work, we have examined the dependence of electrical performance on the interface surface state of gate dielectric/pentacene, which may be modified by chemical properties in the gate dielectric surface.

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Alternative Methods for Assessments of DEMs' Erros (DEM의 오차 평가 방법에 관한 연구)

  • Hwang, Chul-Sue
    • Journal of Korean Society for Geospatial Information Science
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    • v.7 no.2 s.14
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    • pp.23-34
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    • 1999
  • The most widely used measure for indicating the accuracy of DEM is RMSE(nut Mean Square Error), which is used by many national mapping agencies such as the USGS and the Ordnance Survey. Its prevalent use can be followed by the relative ease of calculation and understanding the concepts. However, there are many problems with the measure and the way from which it is often derived. First of all, the index does not involve my description of the mean donation between the two measures of elevation,. This means that it cannot interpret the distributions or patterns of errors involved in DEMs. The distribution of errors in DEMs will show some forms of spatial patterning. In order to explore the real quality of DEMs as a useful database, alternative approaches are needed. In this paper, we examined so called ESDA(Exploratory Spatial Data Analysis) approaches, which were attributed by both aspatial and spatial exploration methods. Our experimental research shows that even simple ESDA methods reveal new aspects of errors, especially spikes, striation, and terracing effect in DEMs, which my be ignored by RMSE measure.

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New lithography technology to fabricate arbitrary shapes of patterns in nanometer scale (나노미터 크기의 임의 형상을 제작하기 위한 새로운 리소그래피 기술)

  • 홍진수;김창교
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.5 no.3
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    • pp.197-203
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    • 2004
  • New lithography techniques are employed for the patterning of arbitrary shapes in nanometer scale. When, in the photolithography, the electromagnetic waves such as UV and X-ray are incident on the mask patterned in nanometer scale, the diffraction effect is unavoidable and degrades images of the mask imprinted on wafer. Only a convex lens is well-known Fourier transformer. It is possible to make the mask Fourier-transformed with the convex lens, even though the size of pattern on the mask is very large compared to the wavelength of electromagnetic wave. If the mask, modified according to new technique described in this paper, was placed at the front of the lens and was illuminated with laser beam, the nanometer-size patterns are only formed on the plane called Fourier transform plane. The new method presented here is quite simple setup and comparable with present and next generation lithographies such as UV/EUV photolithograpy and electron projection lithography when compared in attainable minimum linewidth. In this paper, we showed our theoretical research work in the field of Fourier optics, . In the near future, we are going to verify this theoretical work by experiments.

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