• Proceedings of the KIPE Conference
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• 2010.07a
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• pp.470-471
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• 2010

In this paper, the coupled inductor with three branches in two interleaved converter are analyzed to effectively suppress the high frequency circulating current since the circulating current controller cannot mitigate the high frequency circulating current. As a result, the novel averaged model including the coupled inductor with zero sequence components is developed for reducing the low and high frequency circulating current simultaneously.

• The Transactions of the Korea Information Processing Society
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• v.2 no.4
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• pp.535-542
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• 1995

In this paper we present two preconditioners for solving large sparse linear systems arising from elliptic partial differential equations on massively parallel machines, such as the CM-5. Most massively parallel machines do heavily rely on the message-passing for the interprocessor communications. but according to the current manufacturing standards the cost of communications is very high compared to that of floating point arithmetic computations. Due to this we need an algorithm which minimizes the amount of interprocessor communication on the massively parallel machines. We will show that Block SOR(Successive Over Relaxation) method coupled with the multi-coloring technique is one of such preconditioner on the massively parallel machines, by conducting experiments in the CM-5. Also, we implemented the ADI(Alternation Direction Implicit) method in the CM-5, which has been conventionally one of the most powerful parallel preconditioner. Our experiment shows that Block SOR method coupled with the multi-coloring technique could yield a speedup with 50% efficiency with the range of number of processors form 16 to 512 for a matrix with dimension 512x512. On the other hand, the ADI method shows a very poor performance.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.4
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• pp.333-343
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• 2009

The BPF designed by the formula based on strip line shows the center frequency shift and distortion in filter response and this becomes more significant with higher frequency. In this paper, the novel design based on EM simulation is proposed. In the design, the filter is decomposed into individual resonators and, for each resonator, the reactance slope and the inverter values are measured and tuned to desired design values for a inverter BPF prototype. The filter composed with such resonators shows the desired filter response without further tuning. This is because possible effects of discontinuities and dispersion are included in the filter parameter extraction. The method can generally apply to all filters that can be transformed into inverter BPF prototype. The procedure is verified by designing a 5th-order SIR filter and quite general to adapt into the design of a parallel coupled line filter, and hair-pin filter.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.7
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• pp.1237-1242
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• 2016

In this paper, the low pass filter with harmonics suppression and rejection using parallel coupled-line and radial type open stub is presented. And the resultant characteristic of the proposed low pass filter is that the harmonics are suppressed and rejected in wide bandwidth due to the parallel coupled-line structure. The open stub of a low pass filter is constructed in radial type which can be used to adjust the size of filter. The size of the proposed low pass filter is $6.98{\times}7.60mm2$ and the cut off frequency is 2.45 GHz. And the filter is economical in unit cost and can be constructed easily and has the merit of mass product because the filter is composed of distributed element. Also, the widely rejected harmonics is 128 % in the bandwidth and the insertion and return losses of the low pass filter are 1.07 dB and 19.5 dB, respectively.

• Journal of the Korean Society for Railway
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• v.8 no.1
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• pp.1-5
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• 2005

This paper has presented the parallel cyclic redundancy check (CRC) technique that performs CRC computation in parallel superior to the conventional CRC technique that processes data bits serially. Also, it has showed that the implemented parallel CRC circuit has been successfully applied to the inductively coupled passive RFTD system working at a frequency of 13.56㎒ in order to process the detection of logical faults more fast and the system has been verified experimentally. In comparison with previous works, the proposed RFID system using the parallel CRC technique has been shown to reduce the latency and increase the data processing rates about 15％ In the results. Therefore, it seems reasonable to conclude that the parallel CRC realization in the RFID system offers a means of maintaining the integrity of data in the high speed RFID system.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.10
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• pp.1036-1043
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• 2003

In this paper, novel lumped equivalent circuits for a conventional parallel directional coupler are proposed. This novel equivalent circuits only have self inductance and self capacitance, so we can design exact lumped equivalent circuit. The equivalent circuit and design formula for the presented lumped element coupler is derived based on the even- and odd-mode properties of a parallel-coupled line. By using the derived design formula, we have designed the 3 dB and 10 dB lumped element directional couplers at the center frequency of 100 MHz and 2 GHz, respectively a chip type directional coupler has been designed with multilayer configurations by employing commercial EM simulator. Designed chip-type directional couplers have a 3 dB-coupling value at the center frequency of 2 GHz and fabricated lumped directional coupler on fr4 organic substrate has a 3 dB, 10 dB-coupling values at the center frequency of 100 MHz. Excellent agreements between simulation results and measurement results on the designed directional couplers show the validity of this paper. Furthermore, in order to adapt to multi-layer process such as Low Temperature Cofired Ceramic (LTCC), chip-type lumped element couplers have been designed by using this method.

• Journal of Electrical Engineering and Technology
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• v.13 no.2
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• pp.533-539
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• 2018

In this paper, the transformer type superconducting fault current limiter (SFCL) with additionally coupled circuit was suggested and its peak fault current limiting characteristics due to the fault condition to affect the fault current were analyzed through the fault current limiting tests. The suggested transformer type SFCL is basically identical to the previous transformer type SFCL except for the additional coupled circuit. The additional coupled circuit, which consists of the magnetically coupled winding to the primary and the secondary windings together with another superconducting element and is connected in parallel with the secondary winding of the transformer type SFCL, is contributed to the peak fault current limiting operation for the larger transient fault current directly after the fault occurrence. To confirm the fault current limiting operation of the suggested SFCL, the fault current limiting tests of the suggested SFCL were performed and its effective peak fault current limiting characteristics were analyzed through the analysis on the electrical equivalent circuit.

• Proceedings of the KSR Conference
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• 2004.10a
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• pp.1235-1240
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• 2004

This paper has presented the parallel cyclic redundancy check (CRC) technique that performs CRC computation in parallel superior to the conventional CRC technique that processes data bits serially. Also, it has showed that the implemented parallel CRC circuit had been successfully applied to the inductively coupled passive RFID system working at a frequency of 13.56MHz in order to process the detection of logical faults more fast and the system had been verified experimentally. In comparison with previous works, the proposed RFID system using the parallel CRC technique has been shown to reduce the latency and increase the data processing rates in the results. Therefore, it seems reasonable to conclude that the parallel CRC realization in the RFID system offers a means of maintaining the integrity of data in the high speed RFID system.

• Structural Engineering and Mechanics
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• v.86 no.1
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• pp.49-68
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• 2023

This study investigates the static and dynamic structural analysis of symmetrical and asymmetrical coupled shear walls using the continuous and modified transfer matrix methods by idealizing the coupled shear wall as a three-field CTB-type replacement beam. The coupled shear wall is modeled as a continuous structure consisting of the parallel coupling of a Timoshenko beam in tension (with axial extensibility in the shear walls) and a shear beam (replacing the beam coupling effect between the shear walls). The variational method using the Hamilton principle is used to obtain the coupled differential equations and the boundary conditions associated with the model. Using the continuous method, closed-form analytical solutions to the differential equation for the coupled shear wall with uniform properties along the height are derived and a numerical solution using the modified transfer matrix is proposed to overcome the difficulty of coupled shear walls with non-uniform properties along height. The computational advantage of the modified transfer matrix method compared to the classical method is shown. The results of the numerical examples and the parametric analysis show that the proposed analytical and numerical model and method is accurate, reliable and involves reduced processing time for generalized static and dynamic structural analysis of coupled shear walls at a preliminary stage and can used as a verification method in the final stage of the project.

• The Journal of the Acoustical Society of Korea
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• v.13 no.1E
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• pp.5-10
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• 1994

It is obtained the general expessions of the numerical method are applied for the TEM-mode analysis of multu-layer multi-coupled microstrip lines, In this paper, coupled microstrip are replaced by three-coupled microstrip lines in special aplications. Three-layer versions of three-coupled microstrip lines are specially attactive because of the additional flexibilities offered by three-layer configuration. This structure can be used for obtaining large capacitance and preventing coupling among microstrip lines in filter and coupler. Sappihre is chosen for anisotropic substrates material. The permittivity parallel to the optical axis is higher than the permittivity in the plane perpendicular to this axis.