• 제목/요약/키워드: parallel line

검색결과 952건 처리시간 0.024초

EMTDC를 이용한 765/345kV 병가선로의 불평형 계통 해석 (Unbalanced Power System Analysis in 765/345kV Parallel Transmission Line by Using EMTDC)

  • 김종율;윤재영;최흥관;이운희
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2003년도 하계학술대회 논문집 A
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    • pp.199-201
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    • 2003
  • Because of Korean power system characteristics and increasing power demand, the need of 765kV transmission line is growing gradually. Now a days, KEPCO's 765kV transmission line has been tested and stands for commercial operation. During the first stage, 765kV transmission line will be operated with two voltage grades of 765kV and 345kV, which results the unbalance of power system. So unbalanced current such as zero sequence current flows in the transmission line. In this paper, we describes the simulation study of 765/345kV parallel transmission line by using EMTDC program.

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전달관로 요소를 이용한 가변스텝 시뮬레이션 (Variable step size simulation using transmission line element)

  • 황운규;조승호
    • 대한기계학회:학술대회논문집
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    • 대한기계학회 2000년도 추계학술대회논문집A
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    • pp.682-687
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    • 2000
  • In this paper, the simulation methods using transmission lines are studied and realized, which are necessary in design and analysis of hydraulic control systems. The basic idea of this method is that system components are separated by transmission line element for simulation. The PI-controller can keep inductance level as low as desired. It can also handle nonlinearities and discontinuities without flag signal when restarting integration. Parallel hydraulic circuits are simulated using parallel processing algorithm. To shoe that using variable timestep size in each subsystem, simulation time can be reduced. Performance of the simulation results is compared with that of Runge Kutta method.

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Size and Harmonic Reduced Wilkinson Balun Using Parallel Coupled Line with Open Stub

  • Lee, Won-Kyun;Hwang, Hee-Yong
    • Journal of electromagnetic engineering and science
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    • 제14권4호
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    • pp.387-392
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    • 2014
  • In this paper, a size-reduced Wilkinson balun with wide harmonic-suppressed band is presented. An accurate analysis of the parallel coupled line with an open stub (PCL-OS) is carried out. The PCL-OS structure shows excellent low pass filter and harmonic-suppression characteristics, which is useful for designing a low pass filter unit cell (LUC) with a reduced size. The designed Wilkinson balun at a 2.45 GHz center frequency not only shows an excellent harmonic suppression including the 5th harmonics up to 14 GHz over 15 dB, but it also has an area reduced to 48% of the conventional one.

Analysis of Induced Voltage on Telecommunication Line in Parallel Distribution System

  • Kim, Hyun-Soo;Rhee, Sang-Bong;Lee, Soon-Jeong;Kim, Chul-Hwan;Kim, Yoon Sang
    • Journal of Electrical Engineering and Technology
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    • 제9권2호
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    • pp.726-732
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    • 2014
  • A current flowing through a distribution conductor produces induced voltage, which is harmful to a telecommunication line. Previous research on induced voltage has been focused on single-circuit lines in the distribution system. However, the double-circuit lines, referred to as parallel distribution lines, are widely used in distribution systems because they have significant economic and environmental advantages over single-circuit lines. Therefore, a study on the induced voltage in double-circuit lines is needed. This paper presents a method of calculating the induced voltage in a parallel distribution system using four-terminal parameters and vector analysis. The calculation method is verified by the Electromagnetic Transient Program (EMTP) simulation.

Design and fabrication of a novel multilayer bandpass filter with high-order harmonics suppression using parallel coupled microstrip filter

  • Fathi, Esmaeil;Setoudeh, Farbod;Tavakoli, Mohammad Bagher
    • ETRI Journal
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    • 제44권2호
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    • pp.260-273
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    • 2022
  • This study presents a novel multilayer structure of parallel coupled-line bandpass filtercentered at 2.42 GHz with a fractional bandwidth value of approximately 19.4%. The designed filter can suppress harmonics with an appropriate frequency response by incorporating different techniques based on the multilayer technique. A combination of different techniques such as radial microstrip stubs and defected ground structure (DGS) and defected microstrip structure techniques are employed to suppress harmonics up to 5f0. These techniques are used in two layers to suppress up to 5f0. In addition, in this study, the effects of different parameters, such as the width of slot-line DGS, the angle of diagonal line slots in the upper layer, and the air gap between the two layers on the filter performance, are investigated. To verify the correct circuit operation, the designed filter is implemented and tested. The measurement results of the proposed filter are compared with the simulation results.

4-레그 PWM 컨버터/인버터와 AC 리액터를 사용한 새로운 3상 라인 인터렉터브 무정전전원장치의 개발 (Development of Novel 3-Phase Line-interactive UPS System using 4-leg PWM Converter/Inverter and AC Reactor)

  • 지준근;김효성;설승기;김경환
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2004년도 전력전자학술대회 논문집(1)
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    • pp.77-81
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    • 2004
  • In this paper a novel line interactive UPS (Uninterruptible Power Supply) using the two 4-leg VSCs and AC line reactor is proposed. The 4-leg Voltage Source Converter(VSC) can use the DC link voltage effectively by the 3-D SVPWM method. Hence the DC battery voltage can be reduced by $15\%$ in comparison to that of the conventional line-interactive UPS system. One VSC is in parallel with the AC line reactor of the power source side, and the other is in series with the load. The parallel 4-leg voltage source inverter controls three-phase line voltage independently in order to control the line reactor current indirectly. It eliminates the neutral line current and the active ripple power of the source side using the pqr theory so that unity power factor and the sinusoidal source current can be achieved even though both the source and the load voltages have zero sequence components. The series 4-leg voltage source inverter compensates the line voltage and allows the load voltage to be balanced and harmonic-free. Both of parallel and series 4-leg voltage source inverters always act as independently controllable voltage sources, so that three-phase output voltage shows a seamless transition to the backup mode. The feasibility of the proposed UPS system has been investigated and verified through computer simulation results.

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장거리 병렬 송전선로용 대지 정전용량 보상에 의한 고장점 표정 알고리즘 (Fault Location Algorithm with Ground Capacitance Compensation for Long Parallel Transmission Line)

  • 박철원;김삼용;신명철
    • 전기학회논문지P
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    • 제54권4호
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    • pp.163-170
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    • 2005
  • This paper deals with an improved fault location algorithm with compensation ground capacitance through distributed parameter for a long parallel T/L. For the purpose of fault locating algorithm non-influenced by source impedance and fault resistance, the loop method was used in the system modeling analysis. This algorithm uses a positive and negative sequence of the fault current for high accuracy of fault locating calculation. Power system model of 160km and 300km long parallel T/L was simulated using EMTP software. To evaluate of the proposed algorithm, we used the several different cases 64 sampled data per cycle. The test results show that the proposed algorithm was minimized the error factor and speed of fault location estimation.

배전선로가 초고속통신망에 미치는 유도장해 요소 분석 (A Review of Methods for Calculation of Induced Voltage to a Communication Line from Distribution Power Line)

  • 임용훈;현덕화
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2002년도 하계학술대회 논문집 C
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    • pp.1956-1958
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    • 2002
  • This paper reviews the calculation of induced voltage to a communication line from Power Transmission Line. Power lines, both overhead and underground, often run parallel to weak current lines, such as telecommunication, signal or data transmission systems or protection circuits. The coexistence of both systems in parallel over long lengths is accompanied by the possible induction of significant longitudinal voltage in the weak current line. In order to evaluate a precise induced voltage, this paper indicated problem about coefficient and numerical formula and present some induced voltage production technology standard application.

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CPW와 Offset 결합 전송선로를 이용한 비대칭 다단 분배기 (Unequal Multi-Section Power Divider using CPW and Offset Coupled Transmission Lines)

  • 최종운;윤영철;성규제;김영
    • 한국항행학회논문지
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    • 제23권4호
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    • pp.309-315
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    • 2019
  • 본 논문은 1:3과 1:4 분배 비율을 갖는 비대칭 분배기를 CPW와 offset 결합 전송선로를 이용하여 다단 구조로 구현한 것이다. 이 분배기는 다단 구조의 전송선로와 캐패시터와 저항이 병렬로 연결된 회로로 구성되어 있다. 다단 전송선로는 임의의 임피던스로 종단된 ${\lambda}/4$ 단일 전송선로를 분해하여 그것을 $90^{\circ}$ 전기적 길이보다 짧은 다단 전송선로로 정합시키는 방법으로 구현하였고, RC 병렬회로는 출력 포트의 반사계수와 출력 포트 사이의 고립 특성을 얻기 위해서 전송선로 사이에 연결하였다. 이러한 방법으로 2 GHz에서 설계된 전력분배기는 각 단의 전송선로는 ${\lambda}/4$보다 짧게 구현되어 기존 것 보다 최소 27% 작게 구현하였고, 광 대역 특성을 얻을 수 있음을 확인하였다.

Fin-line taper를 이용한 W-대역 마이크로스트립-도파관 전이구조 설계 (Design of W-band Microstrip-to-Waveguide Transition Structure Using Fin-line Taper)

  • 김영곤;용명훈;이현건;주지한;안세환;서미희
    • 한국인터넷방송통신학회논문지
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    • 제22권3호
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    • pp.37-42
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    • 2022
  • 본 논문에서는 낮은 삽입 손실을 가지는 광대역 마이크로스트립-도파관 전이구조를 제안하였다. 제안하는 전이구조는 자연스러운 전계분포의 필드 변환과 마이크로스트립 선로와 fin-line 사이의 임피던스 정합의 관점에서 설계되었다. Offset DSPSL (double-sided parallel stripline)을 이용한 fin-line 테이퍼로 전이구조의 길이 및 그 구조를 결정할 수 있도록 하였다. 제작된 전이구조의 특성은 전이구조 당 85 ~ 108 GHz의 대역에서 0.67 dB 이하의 낮은 삽입 손실을 가지고 있으며, 83 ~ 110 GHz 이상의 대역에서 1 dB 이하의 삽입 손실을 가짐을 확인하였다. 본 논문에서 제시한 전이구조를 이용하여 W-대역의 초소형 레이다 및 다양한 응용 분야에 적용 가능하리라 예상된다.