• Title/Summary/Keyword: parallel computer processing

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An Analysis of Factors Affecting Quality of Life through the Analysis of Public Health Big Data (클라우드 기반의 공개의료 빅데이터 분석을 통한 삶의 질에 영향을 미치는 요인분석)

  • Kim, Min-kyoung;Cho, Young-bok
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.22 no.6
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    • pp.835-841
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    • 2018
  • In this study, we analyzed public health data analysis using the hadoop-based spack in the cloud environment using the data of the Community Health Survey from 2012 to 2014, and the factors affecting the quality of life and quality of life. In the proposed paper, we constructed a cloud manager for parallel processing support using Hadoop - based Spack for open medical big data analysis. And we analyzed the factors affecting the "quality of life" of the individual among open medical big data quickly without restriction of hardware. The effects of public health data on health - related quality of life were classified into personal characteristics and community characteristics. And multiple-level regression analysis (ANOVA, t-test). As a result of the experiment, the factors affecting the quality of life were 73.8 points for men and 70.0 points for women, indicating that men had higher health - related quality of life than women.

Tracking Algorithm For Golf Swing Using the Information of Pixels and Movements (화소 및 이동 정보를 이용한 골프 스윙 궤도 추적 알고리즘)

  • Lee, Hong, Ro;Hwang, Chi-Jung
    • The KIPS Transactions:PartB
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    • v.12B no.5 s.101
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    • pp.561-566
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    • 2005
  • This paper presents a visual tracking algorithm for the golf swing motion analysis by using the information of the pixels of video frames and movement of the golf club to solve the problem fixed center point in model based tracking method. The model based tracking method use the polynomial function for trajectory displaying of upswing and downswing. Therefore it is under the hypothesis of the no movement of the center of gravity so this method is not for the amateurs. we proposed method using the information of pixel and movement, we first detected the motion by using the information of pixel in the frames in golf swing motion. Then we extracted the club head and hand by a properties of club shaft that consist of the parallel line and the moved location of club in up-swing and down-swing. In addition, we can extract the center point of user by tracking center point of the line between center of head and both foots. And we made an experiment with data that movement of center point is big. Finally, we can track the real trajectory of club head, hand and center point by using proposed tracking algorithm.

Stereo Matching by Dynamic Programming with Edges Emphasized (에지 정보를 강조한 동적계획법에 의한 스테레오 정합)

  • Joo, Jae-Heum;Oh, Jong-kyu;Seol, Sung-Wook;Lee, Chul-Hun;Nam, Ki-Gon
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.36S no.10
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    • pp.123-131
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    • 1999
  • In this paper, we proposed stereo matching algorithm by dynamic programming with edges emphasized. Existing algorithms show blur generally at depth discontinuities owing to smoothness constraint and non-existence of matching pixel in occlusion regions. Also it accompanies matching error by lackness of matching information in the untextured regions. This paper defines new cost function to make up for the problems occurred to existing algorithms. It is possible through deriving matching of edges in left and right images to be carried out between edge regions anf deriving that in the other regions to be peformed between the other regions. In case of the possibility that edges can be Produced in a large amount, matching between edge information adds weight to cost function in proportion to Path distance. Proposed algorithm was applied to various images obtained by convergent camera model as well as parallel camera model. As the result, proposed algorithm showed improved performance in the aspect of matching error and processing in the occlusion regions compared to existing algorithms. Also it could improve blur especially in discontinuity regions.

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Design and Implementation of Accelerator Architecture for Binary Weight Network on FPGA with Limited Resources (한정된 자원을 갖는 FPGA에서의 이진가중치 신경망 가속처리 구조 설계 및 구현)

  • Kim, Jong-Hyun;Yun, SangKyun
    • Journal of IKEEE
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    • v.24 no.1
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    • pp.225-231
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    • 2020
  • In this paper, we propose a method to accelerate BWN based on FPGA with limited resources for embedded system. Because of the limited number of logic elements available, a single computing unit capable of handling Conv-layer, FC-layer of various sizes must be designed and reused. Also, if the input feature map can not be parallel processed at one time, the output must be calculated by reading the inputs several times. Since the number of available BRAM modules is limited, the number of data bits in the BWN accelerator must be minimized. The image classification processing time of the BWN accelerator is superior when compared with a embedded CPU and is faster than a desktop PC and 50% slower than a GPU system. Since the BWN accelerator uses a slow clock of 50MHz, it can be seen that the BWN accelerator is advantageous in performance versus power.

A Striped Checkpointing Scheme for the Cluster System with the Distributed RAID (분산 RAID 기반의 클러스터 시스템을 위한 분할된 결함허용정보 저장 기법)

  • Chang, Yun-Seok
    • The KIPS Transactions:PartA
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    • v.10A no.2
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    • pp.123-130
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    • 2003
  • This paper presents a new striped checkpointing scheme for serverless cluster computers, where the local disks are attached to the cluster nodes collectively form a distributed RAID with a single I/O space. Striping enables parallel I/O on the distributed disks and staggering avoids network bottleneck in the distributed RAID. We demonstrate how to reduce the checkpointing overhead and increase the availability by striping and staggering dynamically for communication intensive applications. Linpack HPC Benchamark and MPI programs are applied to these checkpointing schemes for performance evaluation on the 16-nodes cluster system. Benchmark results prove the benefits of the striped checkpointing scheme compare to the existing schemes, and these results are useful to design the efficient checkpointing scheme for fast rollback recovery from any single node failure in a cluster system.

A Fast Parity Resynchronization Scheme for Small and Mid-sized RAIDs (중소형 레이드를 위한 빠른 패리티 재동기화 기법)

  • Baek, Sung Hoon;Park, Ki-Wong
    • KIPS Transactions on Computer and Communication Systems
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    • v.2 no.10
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    • pp.413-420
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    • 2013
  • Redundant arrays of independent disks (RAID) without a power-fail-safe component in small and mid-sized business suffers from intolerably long resynchronization time after a unclean power-failure. Data blocks and a parity block in a stripe must be updated in a consistent manner, however a data block may be updated but the corresponding parity block may not be updated when a power goes off. Such a partially modified stripe must be updated with a correct parity block. However, it is difficult to find which stripe is partially updated (inconsistent). The widely-used traditional parity resynchronization manner is a intolerably long process that scans the entire volume to find and fix inconsistent stripes. This paper presents a fast resynchronization scheme with a negligible overhead for small and mid-sized RAIDs. The proposed scheme is integrated into a software RAID driver in a Linux system. According to the performance evaluation, the proposed scheme shortens the resynchronization process from 200 minutes to 5 seconds with 2% overhead for normal I/Os.

Design of Evolvable Hardware based on Genetic Algorithm Processor(GAP)

  • Sim Kwee-Bo;Harashiam Fumio
    • International Journal of Fuzzy Logic and Intelligent Systems
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    • v.5 no.3
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    • pp.206-215
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    • 2005
  • In this paper, we propose a new design method of Genetic Algorithm Processor(GAP) and Evolvable Hardware(EHW). All sorts of creature evolve its structure or shape in order to adapt itself to environments. Evolutionary Computation based on the process of natural selection not only searches the quasi-optimal solution through the evolution process, but also changes the structure to get best results. On the other hand, Genetic Algorithm(GA) is good fur finding solutions of complex optimization problems. However, it has a major drawback, which is its slow execution speed when is implemented in software of a conventional computer. Parallel processing has been one approach to overcome the speed problem of GA. In a point of view of GA, long bit string length caused the system of GA to spend much time that clear up the problem. Evolvable Hardware refers to the automation of electronic circuit design through artificial evolution, and is currently increased with the interested topic in a research domain and an engineering methodology. The studies of EHW generally use the XC6200 of Xilinx. The structure of XC6200 can configure with gate unit. Each unit has connected up, down, right and left cell. But the products can't use because had sterilized. So this paper uses Vertex-E (XCV2000E). The cell of FPGA is made up of Configuration Logic Block (CLB) and can't reconfigure with gate unit. This paper uses Vertex-E is composed of the component as cell of XC6200 cell in VertexE

Speech Recognition Performance Improvement using a convergence of GMM Phoneme Unit Parameter and Vocabulary Clustering (GMM 음소 단위 파라미터와 어휘 클러스터링을 융합한 음성 인식 성능 향상)

  • Oh, SangYeob
    • Journal of Convergence for Information Technology
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    • v.10 no.8
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    • pp.35-39
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    • 2020
  • DNN error is small compared to the conventional speech recognition system, DNN is difficult to parallel training, often the amount of calculations, and requires a large amount of data obtained. In this paper, we generate a phoneme unit to estimate the GMM parameters with each phoneme model parameters from the GMM to solve the problem efficiently. And it suggests ways to improve performance through clustering for a specific vocabulary to effectively apply them. To this end, using three types of word speech database was to have a DB build vocabulary model, the noise processing to extract feature with Warner filters were used in the speech recognition experiments. Results using the proposed method showed a 97.9% recognition rate in speech recognition. In this paper, additional studies are needed to improve the problems of improved over fitting.

Design & Implementation of Flight Software Satellite Simulator based on Parallel Processing (병렬처리 기반의 위성 탑재소프트웨어 시뮬레이터 설계 및 개발)

  • Choi, Jong-Wook;Nam, Byeong-Gyu
    • Journal of Satellite, Information and Communications
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    • v.7 no.2
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    • pp.80-86
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    • 2012
  • The software-based satellite simulator has been developed from the start of the project to resolve the restriction and limitation of using hardware-based software development platform. It enables the development of flight software to be performed continuously since initial phase. The satellite simulator emulates the on-board computer, I/O modules, electronics and payloads, and it can be easily adapted and changed on hardware configuration change. It supports the debugging and test facilities for software engineers to develop flight software. Also the flight software can be loaded without any modification and can be executed as faster than real-time. This paper presents the architecture and design of software-based GEO satellite simulator which has hot-standby redundancy mechanism, and flight software development and test under this environment.

All-port Broadcasting Algorithms on Wormhole Routed Star Graph Networks (웜홀 라우팅을 지원하는 스타그래프 네트워크에서 전 포트 브로드캐스팅 알고리즘)

  • Kim, Cha-Young;Lee, Sang-Kyu;Lee, Ju-Young
    • Journal of KIISE:Computer Systems and Theory
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    • v.29 no.2
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    • pp.65-74
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    • 2002
  • Recently star networks are considered as attractive alternatives to the widely used hypercube for interconnection networks in parallel processing systems by many researchers. One of the fundamental communication problems on star graph networks is broadcasing In this paper we consider the broadcasting problems in star graph networks using wormhole routing. In wormhole routed system minimizing link contention is more critical for the system performance than the distance between two communicating nodes. We use Hamiltonian paths in star graph to set up link-disjoint communication paths We present a broadcast algorithm in n-dimensional star graph of N(=n!) nodes such that the total completion time is no larger than $([long_n n!]+1)$ steps where $([long_n n!]+1)$ is the lower bound This result is significant improvement over the previous n-1 step broadcasting algorithm.