• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 D
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• pp.1849-1851
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• 1999

The PDP(Plasma Display Panel) barrier rib was fabricated by focused $Ar^+$ laser ($\lambda$=514nm) and Nd:YAG($\lambda$=532, 266 nm) laser irradiation. The depth of the etched groove increases with increasing a laser fluence. and decreasing a scan speed. Using the second harmonic of the Nd:YAG laser, the threshold laser fluence was $6.5mJ/cm^2$ for the sample of PDP barrier rib dried at $120^{\circ}C$. The thickness of $150{\mu}m$ of the sample on the glass was etched without any damage on the glass substrate by fluence of $19.5J/cm^2$. The barrier rib sample on hot plate was etched by Nd:YAG laser(532 nm) as increasing a temperature of the sample. In this case, the etch rate was $95{\mu}m/s$, $190{\mu}m/s$ at room temperature, $175^{\circ}C$ respectively.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 춘계학술대회 논문집 디스플레이 광소자 분야
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• pp.129-132
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• 2000

The PDP(Plasma Display Panel) barrier rib material on the glass substrate was patterned for fabrication of the PDP cell using Nd:YAG laser(1064 nm) which can generate the second(532 nm) and forth(266 nm) harmonic wave by HGM(harmonic generation modules). At a scan speed of 20 ${\mu}m/s$ with the second harmonic wave(532 nm) of Nd:YAG laser, the etching threshold laser fluence of the PDP material was 6.5 $mJ/cm^2$ and a sample(thickness = 180 ${\mu}m$) on the glass substrate was removed clearly at a laser fluence of 19.5 $mJ/cm^2$. In order to increase the throughput of the fabrication we divided a single-beam into multi-beams by using a metal mask between the sample and the focusing lens. As a result, 10 lines of PDP cell were formed by one laser beam scanning at a scan speed of 200 ${\mu}m/s$ and a laser fluence of 2.86 $J/cm^2$.

• 한국정밀공학회지
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• 제21권12호
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• pp.92-99
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• 2004

The formation degree of sustain (ITO pattern) decides quality of PDP (Plasma Display Panel). For this reason, it makes efforts in searching defects more than 30 un as 100%. Now, the existing inspection is dependent upon naked eye or microscope in off-line PDP manufacturing process. In this study developed prototype inspection system of PDP 170 glass is based on line-scan mechanism. Developed system creates information that detects and sorts kinds of defect automatically. Designed inspection technology adopts multi-vision method by slip-beam formation for the minimum of inspection time and detection algorithm is embodied in detection ability of developed system. Designed algorithm had to make good use of kernel matrix that draws up an approach to geometry. A characteristic of defects, as pin hole, substance, protrusion, are extracted from blob analysis method. Defects, as open, short, spots and et al, are distinguished by line type inspection algorithm. In experiment, we could have ensured ability of inspection that can be detected with reliability of up to 95% in about 60 seconds.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2003년도 International Meeting on Information Display
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• pp.734-738
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• 2003

The addressing time should be reduced by modifying cell and/or driving method in order to replace the dual scan system by single scan and increase the luminance in large ac plasma display panel(PDP). In this paper, the relationships between of discharge cell structure and addressing time in ac PDP are investigated. It is found out that the addressing time was decreased with decreasing gap of ITO electrode and thickness of transparence dielectric layer on the front glass. The decrease rates were 4% per $10{\mu}m$ and 4% per $5{\mu}m$, respectively. Also in cases of decreasing height of barrier rip and thickness of white dielectric layer on the rear glass, addressing times were at the rate of 4% per $10{\mu}m$ and 4% per $2{\mu}m$, respectively.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.202-205
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• 2002

Polycrystalline silicon thin film transistors (poly-Si TFTs) are used in a wide variety of applications, and will figure prominently future high-resolution, high-performance flat panel display technology However, it was very difficult to fabricate high performance poly-Si TFTs at a temperature lower than 300$^{\circ}C$ for glass substrate. Conventional process on a glass substrate were limited temperature less than 600$^{\circ}C$ This paper proposes a high temperature process above 750$^{\circ}C$ using a flexible molybdenum substrate deposited hydrogenated amorphous silicon (a-Si:H) and than crystallized a rapid thermal processor (RTP) at the various temperatures from 750$^{\circ}C$ to 1050$^{\circ}C$. The high temperature annealed poly-Si film illustrated field effect mobility higher than 30 $\textrm{cm}^2$/Vs, achieved I$\sub$on//I$\sub$off/ current ratio of 10$^4$ and crystall volume fraction of 92%. In this paper, we introduce the new TFTs Process as flexible substrate very promising roll-to-roll process, and exhibit the properties of high temperature crystallized poly-Si Tn on molybdenum substrate.

• 한국전기전자재료학회논문지
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• 제22권3호
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• pp.199-204
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• 2009

The effect of temperature on ACF thermocompression bonding for FPD assembly was investigated, It was found that Au bumps on driver IC's were not bonded to the glass substrate when the bonding temperature was below $140^{\circ}C$ so bonds were made at temperatures of $163^{\circ}C$, $178^{\circ}C$ and $199^{\circ}C$ for further testing. The bonding time and pressure were constant to 3 sec and 3.038 MPa. To test bond reliability, FPD assemblies were subjected to thermal shock storage tests ($-30^{\circ}C$, $1\;Hr\;{\leftrightarrow}80^{\circ}C$, 1 Hr, 10 Cycles) and func! tionality was verified by driver testing. It was found all of FPDs were functional after the thermal cycling. Additionally, Au bumps were bonded using ACF's with higher conductive particle densities at bonding temperatures above $163^{\circ}C$. From the experimental results, when the bonding temperature was increased from $163^{\circ}C$ to $199^{\circ}C$, the curing time could be reduced and more conductive particles were retained at the bonding interface between the Au bump and glass substrate.

• 한국기계가공학회지
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• 제4권1호
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• pp.37-42
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• 2005

The localization of manufacturing technique development is actualizing for low cost with supplies of display devices. We need more high cutting technique because consumers want flat glasses of various sizes. Recently, most general two methods are normal wheel cutting and laser cutting, but both of them have some faults. First, the wheel cutting has cracks and sharp edges of sections. Second, it is easy for laser cutting to cut curved lines. however, it has thermal damage and low traverse speed. I suggest a new cutting method by high-wave frequency vibration wheel cutting(HFVC), which is good for quality improvement. Vertical cracks and crack depth is observed, after HFVC. When the average of the crack depth is $30{\mu}m$ and the average of the wallner liner depth is $200{\mu}m$, it has the most high quality of the sections in this experiment. As a result, when we consider between the normal wheel cutting method and the HFVC method, the latter has low cracks and good quality.

• 한국전기전자재료학회논문지
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• 제16권1호
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• pp.26-32
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• 2003

Then-channel poly-Si thin-film transistors (poly-Si TFT's) formed by solid phase crystallization (SPC) method on glass were measured to obtain the electrical parameters such as of I-V characteristics, mobility, leakage current, threshold voltage, and subthreshold slope. Then, devices were analyzed to obtain the reliability and appliability on TFT-LCD with large-size and high density. In n-channel poly-Si TFT with 5$\mu\textrm{m}$/2$\mu\textrm{m}$, 8$\mu\textrm{m}$, 30$\mu\textrm{m}$ devices of channel width/length, the field effect mobilities are 111, 116, 125 $\textrm{cm}^2$/V-s and leakage currents are 0.6, 0.1, and 0.02 pA/$\mu\textrm{m}$, respectively. Low threshold voltage and subthreshold slope, and good ON-OFF ratio are shown, as well. Thus. the poly-Si TFT's used by SPC are expected to be applied on TFT-LCD with large-size and high density, which can integrate the display panel and peripheral circuit on a targe glass substrate.

• 자원리싸이클링
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• 제24권2호
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• pp.23-28
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• 2015

현재 국내에서 소비되는 주석의 대부분은 수입에 의존하고 있다. 본 연구에서는 평판 유리, LCD 패널 유리 기판 생산시 발생하는 주석 용탕에 함유된 주석산화물을 건식법으로 회수하는 공정을 조사하였다. 환원반응온도를 변화시키며 주석의 회수율을 조사한 결과 $1350^{\circ}C$에서 최대 회수율을 얻을 수 있었다. 또한 주석 산화물의 1차 제련과 슬래그의 2차 제련을 통해 88%의 회수율을 얻었다. 건식공정으로 회수된 조주석을 전해정련처리하여 99.9%의 순도를 지닌 주석 금속을 제조하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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• pp.431-432
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• 2007

In this study, we used screen printing on the rear glass with silver electrodes, phosphor and a dielectric which is on the silver electrodes, and carried out firing in the temperature of $550^{\circ}C$, $570^{\circ}C$, $450^{\circ}C$ each. To seal the rear and top glass together, we used crystalline frit paste as a sealing material with dispenser and carried out firing up to $450^{\circ}C$. As using this panel, we focused on optimizing the condition which influences characteristics of discharging by the distance between electrodes, electrode structure, type and pressure of gases for FFL.