• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 하계종합학술대회논문집
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• pp.465-468
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• 1998

For porous silicon layer to be used as active layer in various devices, it is necessary to be formed locally along with a designed pattern on the wafer. However, there is still no suitable masking layer to withstand against the high concentration of HF for a time of some minutes up to some hours during the anodic process effectively. In this work, we investigated the property of selectivity between p$^{+}$ and n layers to form localized porous silicon even without a mask by the difference of the anodic I-V characteristics on the doping level and doping type. The width of the pattern made in the sample was 2mm, and the formed porous silicon layer was observed by SEM to see the morphology on the cross section below the surface. As the results, it was found that the selectivity was reasonable for the pattern size over 100.mu.m.m.

• 통합자연과학논문집
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• 제2권3호
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• pp.207-210
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• 2009

Multiple rugate structures can be etched on a silicon wafer and placed in the same physical location, showing that many sharp spectral lines can be obtained in the optical reflectivity spectrum. Porous silicon samples were prepared by electrochemical etch of heavily doped p-type silicon wafers. The etching solution consisted of a 3:1 volume mixture of aqueous 48% hydrofluoric acid and absolute ethanol. Galvanostatic etch was carried out in a Teflon cell by using a two-electrode configuration with a Pt mesh counterelectrode. A sinusoidal current density waveform varying between 51.5 and $74.6mA/cm^2$ is applied. The anodization current was supplied by a Keithley 2420 high-precision constant current source which is controlled by a computer to allow the formation of PSi multilayer.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2002년도 추계기술심포지움논문집
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• pp.115-121
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• 2002

In this research we have investigated the characteristics of ultra thin $HfO_2 /SiON$stack structure films using several analytical techniques. SiON layer was thermally grown on standard SCI cleaned silicon wafer at $825^{\circ}C$ for 12sec under $N_2$O ambient. $HfO_2 /SiON$$_4$/$H_2O$ as precursors and $N_2$as a carrier/purge gas. Solid HfCl$_4$was volatilized in a canister kept at $200^{\circ}C$ and carried into the reaction chamber with pure $N_2$carrier gas. $H_2O$ canister was kept at $12^{\circ}C$ and carrier gas was not used. The films were grown on 8-inch (100) p-type Silicon wafer at the $300^{\circ}C$ temperature after standard SCI cleaning, Spectroscopic ellipsometer and TEM were used to investigate the initial growth mechanism, microstructure and thickness. The electrical properties of the film were measured and compared with the physical/chemical properties. The effects of heat treatment was discussed.

• 대한기계학회논문집A
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• 제34권11호
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• pp.1631-1636
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• 2010

본 연구는 AFM 을 이용하여 nano scale 의 Lithography 를 구현하는 것이다. 외부의 pulse generator 를 통하여 전류를 통전 시키는 방법을 수정함으로써, 일정 습도를 유지한 상태의 AFM 내부에서 Si-wafer 의 표면과 Tip의 사이에 전원을 인가하고 pulse generator 에서 임의로 pulse 폭의 변화를 준다. Si-wafer 표면에서 물 분자가 Tip과 wafer 사이의 직접적인 전류의 이동조절로 인해 전기 화학적 반응을 적절히 제한하여 산화물을 생성시키는 방법이다. 이렇게 생성된 산화물은 불산 처리를 통하여 산화물을 식각시켜 미세 그루브를 구현 할 수 있다. 본 연구를 통한 나노 패턴 생성 기법은 나노 머시닝 기술의 진보에 잠재적 가능성을 제시한다.

• 통합자연과학논문집
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• 제3권3호
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• pp.168-173
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• 2010

Novel porous silicon chip exhibiting dual optical properties, both Frbry-Perot fringe (optical reflectivity) and photoluminescence had been developed and used as chemical sensors. Porous silicon samples were prepared by an electrochemical etch of p-type sillicon wafer (boron-doped, <100> orientation, resistivity 1 - 10 ${\Omega}$). The ething solution was prepared by adding an equal volume of pure ethanol to an aqueous solution of HF (48% by weight). The porous silicon was illuminated with a 300 W tungsten lamp for the duration of etch. Ething was carried out as a two-electrode Kithley 2420 preocedure at an anodic current. The surface of porous silicon was characterized by FT-IR instrument. The porosity of samples was about 80%. Three different types of porous silicon, fresh porous silicon (Si-H termianated), oxidized porous silicon (Si-OH terminated), and surface-derivatized porous silicon (Si-R terminated), were prepared by the thermal oxidation and hydrosilylation. Then the samples were exposed to the wapor of various organics vapors. such as chloroform, hexane, methanol, benzene, isopropanol, and toluene. Both reflectivity and photoluminescence were simultaneously measured under the exposure of organic wapors.

• 한국태양에너지학회:학술대회논문집
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• 한국태양에너지학회 2011년도 추계학술발표대회 논문집
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• pp.245-248
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• 2011

Many researches have been carried out to improve light absorption in the crystalline silicon solar cell fabrication. The rear reflection is applied to increase the path length of light, resulting in the light absorption enhancement and thus the efficiency improvement mainly due to increase in short circuit current. In this paper, we manufactured the silicon solar cell using the mono crystalline silicon wafers with $156{\times}156mm^2$, 0.5~3.0 ${\Omega}{\cdot}cm$ of resistivity and p-type. After saw damage removal, the dielectric film ($SiN_x$)on the back surface was deposited, followed by surface texturing in the KOH solution. It resulted in single-side texturing wafer. Then the dielectric film was removed in the HF solution. The silicon wafers were doped with phosphorus by $POCl_3$ with the sheet resistance 50 ${\Omega}/{\Box}$ and then the silicon nitride was deposited on the front surface by the PECVD with 80nm thickness. The electrodes were formed by screen-printing with Ag and Al paste for front and back surface, respectively. The reflectance and transmittance for the single-sided and double-sided textured wafers were compared. The double-sided textured wafer showed higher reflectance and lower transmittance at the long wavelength region, compared to single-sided. The completed crystalline silicon solar cells with different back surface texture showed the conversion efficiency of 17.4% for the single sided and 17.3% for the double sided. The efficiency improvement with single-sided textured solar cell resulted from reflectance increase on back surface and light absorption enhancement.

• 한국생산제조학회지
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• 제22권3_1spc호
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• pp.504-508
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• 2013

This paper describes in detail the life prediction models and simulations of thermal fatigue under different mold compounds and chip sizes for wafer-level embedded SiP. Three-dimensional finite element models are built to simulate the viscoplastic behaviors for various mold compounds and chip sizes. In particular, the bonding parts between a mold and silicon nitride (Si3N4) are carefully modeled, and the strain distributions are studied. Three different chip sizes are used, and the effects of the mold compounds are observed. Through the numerical studies, it is found that type-C, which has a relatively lower Young's modulus and higher CTE, has a better fatigue life than the other mold compounds. In addition, the $4{\times}4$ chip has a shorter life than the $6{\times}6$ and $8{\times}8$ chips.

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2007년도 춘계학술대회
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• pp.295-298
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• 2007

Reduction of optical losses in crystalline silicon solar cells by surface modification is one of the most important issues of silicon photovoltaics. Porous Si layers on the front surface of textured Si substrates have been investigated with the aim of improving the optical losses of the solar cells, because an anti-reflection coating(ARC) and a surface passivation can be obtained simultaneously in one process. We have demonstrated the feasibility of a very efficient porous Si ARC layer, prepared by a simple, cost effective, electrochemical etching method. Silicon p-type CZ (100) oriented wafers were textured by anisotropic etching in sodium carbonate solution. Then, the porous Si layers were formed by electrochemical etching in HF solutions. After that, the properties of porous Si in terms of morphology, structure and reflectance are summarized. The structure of porous Si layers was investigated with SEM. The formation of a nanoporous Si layer about 100nm thick on the textured silicon wafer result in a reflectance lower than 5% in the wavelength region from 500 to 900nm. Such a surface modification allows improving the Si solar cell characteristics. An efficiency of 13.4% is achieved on a monocrystalline silicon solar cell using the electrochemical technique.

• Mass Spectrometry Letters
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• 제12권2호
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• pp.47-52
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• 2021

Evaluating the impurity concentrations in semiconductor thin films using time of flight secondary ion mass spectrometry (ToF-SIMS) is an effective technique. The mass interference between isotopes and matrix element in data interpretation makes the process complex. In this study, we have investigated the doping concentration of phosphorus in, phosphorus doped silicon thin film on glass using ToF-SIMS in the dynamic mode of operation. To overcome the mass interference between phosphorus and silicon isotopes, the quantitative analysis of counts to concentration conversion was done following two routes, standard relative sensitivity factor (RSF) and SIMetric software estimation. Phosphorus doped silicon thin film of 180 nm was grown on glass substrate using hot wire chemical vapor deposition technique for possible applications in optoelectronic devices. Using ToF-SIMS, the phosphorus-31 isotopes were detected in the range of 10¹~10⁴ counts. The silicon isotopes matrix element was measured from p-type silicon wafer from a separate measurement to avoid mass interference. For the both procedures, the phosphorus concentration versus depth profiles were plotted which agree with a percent difference of about 3% at 100 nm depth. The concentration of phosphorus in silicon was determined in the range of 10¹⁹~10²¹ atoms/cm³. The technique will be useful for estimating distributions of various dopants in the silicon thin film grown on glass using ToF-SIMS overcoming the mass interference between isotopes.

• 대한전자공학회논문지
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• 제7권2호
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• pp.33-42
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• 1970

액상과 고상의 불순물원을 사용한 이중확산법을 이용하여 초분수형 p-n 접합 VVC다이오드를 열작하고 그 특성을 측정하였다. 먼저 접합부근의 불순물분포를 지수난수로 근사시키고 여기에서 부터 유도되는 인가전압대 접태용총번계, 접합부에서의 섬계로계강도, 규재주파수 등을 고려하여 WC 다이오드외 새로운 담계수법을 위시하였다. 이 설계도표는 원하는 특성의 VVC다이오드를 번표와에서 나접 설계 할수있으므로 매우 사리하다. VVC다이오드는 2.5ohnm-cm의 n형, 실리콘박편위에 도너불순물 POCl3를 사용하여 선을 확정시키고, 다시 억셉터 불순물 BN을 사용하여 붕소를 확산시켜서, 접합깊이 2미크론에 초단계형접합을 만드므로서 제작하였다. 본연구에서 텔레비젼 수상기튜너용으로 시작한 다이오드의 최대용량대 총소용량의 비는 4:1이였고 그외의 전기적 제 특성도 이론적으로 설계한 값들과 거의 합치된 결과를 얻었다. 한편 이때의 실리콘 박편의 제작법과 확산기술에 관하여 간단히 기술하였다.