• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.11a
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• pp.163-166
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• 2002

We investigated structural and electrical properties of Metal-Oxide-Semiconductor(MOS) structure using Hafnium $oxide(HfO_{2})$ as high-k gate dielectric material. $HfO_{2}$ films are ultrathin gate dielectric material witch have a thickness less than 2.0nm， so it is spotlighted to be substituted $SiO_{2}$ as gate dielectric material. In this paper We have grown $HfO_{2}$ films with pt electrode on P-type Silicon substrate by RF magnetron sputtering system using $HfO_{2}$ target and oserved the property of semiconductor-oxide interface. Using pt electrode, it is necessary to be annealed at ${300^{\circ}C}$. This process is to increase an adhesion ratio between $HfO_{2}$ films with pt electrode. In film deposition process, the deposition time of $HfO_{2}$ films is an important parameter. Structura1 properties are invetigated by AES depth profile, and electrical properties by Capacitance-Voltage characteristic. Interface trap density are measured to observe the interface between $HfO_{2}$ with Si using High-frequency(1MHz) C-V and Quasi - static C-V characteristic.

• Korean Journal of Materials Research
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• v.5 no.5
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• pp.552-559
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• 1995

Titanium nitride films were deposited on the (100) oriented-p-type silicon substrates of RF plasma enhanced chemical vapor depositiom\n using a gaseous mixutre of TiCl$_{4}$, N$_{2}$, H$_{2}$ and Ar. The chemincal composition, structure and the rsistivituy of the films were investigated with the deposition variables such as the flow rate ratio of N$_{2}$/TiCl$_{4}$, the deposition temperature and the RF power. The deposition rate increases with increasing the flow rate ratio of N$_{2}$TiCl$_{4}$ and RF power, while the rate decreases with increasing the deposition temperature. As the flow rate ratio of N$_{2}$/TiCl$_{4}$ and depostion temperature increases within proper RF pwoer, the Cl concentartion in the films decreases and the stoichiometry and crystallingiy are improved, so decreases the resistivity of the films. The films depostied under the condition of the N$_{2}$/TiCl$_{4}$ ratio of 30, the RF power of 50W and the depostion temperature of 62$0^{\circ}C$ had the Cl content of 1.5at% and the resistivity of 56㏁cm. Also, the bottom coverage of the films was above 60% on the step with the width and depth of 0.6${\mu}{\textrm}{m}$$\times$0.6${\mu}{\textrm}{m}$.

• Journal of the Korean Institute of Telematics and Electronics T
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• v.35T no.1
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• pp.7-13
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• 1998

The VLSI devices of submicron level trend to have a lowering of reliability because of hot carriers by two dimensional influences which are caused by short channel effects and which are not generated in a long channel devices. In order to minimize the two dimensional influences, much research has been made into various types of source/drain structures. MOS typed tunnel transistor with Schottky barrier junctions at source/drain, which has the advantages in fabrication process, downsizing and response speed, has been proposed. The experimental device was fabricated with p type silicon, and manifested the transistor action, showing the unsaturated output characteristics and the high transconductance comparing with that in field effect mode. The results of trial indicate for better performance as follows; high doped channel layer to lower the driving voltage, high resistivity substrate to reduce the leakage current from the substrate to drain.

• Journal of Magnetics
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• v.8 no.4
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• pp.138-141
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• 2003

$Ni_{0.65}Zn_{0.35}Fe_2O_4$thin films were prepared by using a sol-gel method. Their crystallographic, dielectric and magnetic properties were investigated as a function of Cu contents by means of an X-ray diffractometer (XRD), X-ray reflectivity, LCZ meter (NF2232), a vibrating sample magnetometer (VSM), and an atomic force microscope (AFM). From typical C-V measurements for $Ni_{0.65}Zn_{0.35}Fe_2O_4$ thin films on p-type silicon substrate, the surface charge density was calculated as 1.4 ${\mu}$C/$m^2$. The dielectric constant evaluated from the capacitance at the accumulation state was 28. The high $H_{c}$ and low $M_{sat}$ at x=0.0 and 0.1 were due to the growth of the ${\alpha}$-$Fe_2O_3$ phase having antiferromagnetic properties. The rapidly decreased $H_{c}$ and increased $M_{sat}$ at x=0.2 and 0.3 can be explained that the ${\alpha}$-$Fe_2O_3$ phases have completely disappeared at x=0.3 and so, non-magnetic defects are minimized. The $M_{sat}$ was slightly decreased and the $H_{c}$ was increased above at x=0.3 because the increase of grain boundary due to smaller grain size acts as defects during magnetization process.

• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.67-67
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• 2000

CeO2는 cubic 구조의 일종인 CaR2 구조를 가지고 있으며 격자상수가 Si의 격장상수와 매우 비슷하여 Si 기판위에 에피텍셜하게 성장할 수 있는 가능성이 매우 크다. 따라서 SOI(silicon-on-insulator)구조의 실현을 위하여 Si 기판위에 CeO2 박막을 에피텍셜하게 성장시키려는 많은 노력이 있어왔다. 또한 metal-ferroelectric-semiconductor field effect transistor)에서 ferroelectric 박막과 Si 기판사이의 완충층으로 사용된다. 이러한 CeO2의 응용을 위해서는 Si 기판 위에 성장된 CeO2 박막의 방위성 및 CeO2/Si 구조의 전기적 특성을 알아보는 것이 매우 중요하다. 본 연구에서는 Si(100) 기판위에 CeO2(200)방향으로 성장하는 박막과 EcO2(111) 방향으로 성장하는 박막을 rf magnetron sputtering 방법으로 증착하여 각각의 구조적, 전기적 특성을 분석하였다. RCA 방법으로 세정한 P-type Si(100)기판위에 Ce target과 O2를 사용하여 CeO2(200) 및 CeO2(111)박막을 증착하였다. 증착후 RTA(rapid thermal annealing)방법으로 95$0^{\circ}C$, O2 분위기에서 5분간 열처리를 하였다 이렇게 제작된 CeO2 박막의 구조적 특성을 XRD(x-ray diffraction)방법으로 분석하였고, Al/CeO2/Si의 MIS(metal-insulator-semiconductor)구조를 제작하여 C-V (capacitance-voltage), I-V (current-voltage) 특성을 분석하였으며 TEM(transmission electron microscopy)으로 증착된 CeO2막과 Si 기판과의 계면 특성을 연구하였다. C-V특성에 있어서 CeO2(111)/Si은 CeO2(111)의 두께가 증가함에 따라 hysteresis windows가 증가한 방면 CeO2(200)/Si은 hysteresis windows가 아주 작을뿐만 아니라 CeO2(200)의 두께가 증가하더라도 hysteresis windos가 증가하지 않았다. CeO2(111)/Si과 CeO2(200)/Si의 C-V 특성의 차이는 CeO2(111)과 CeO2(200)이 Si 기판에 의해 받은 stress의 차이와 이에 따른 defect형성의 차이에 의한 것으로 사료된다.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.241.2-241.2
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• 2013

최근, 비정질 산화물 반도체 thin film transistor (TFT)는 수소화된 비정질 실리콘 TFT와 비교하여 높은 이동도와 큰 on/off 전류비, 낮은 구동 전압을 가짐으로써 빠른 속도가 요구되는 차세대 투명 디스플레이의 TFT로 많은 연구가 진행되고 있다. 한편, 기존의 MOSFET 제작 시 우수한 박막을 얻기 위해서는 $500^{\circ}C$ 이상의 높은 열처리 온도가 필수적이며 이는 유리 기판과 플라스틱 기판에 적용하는 것이 적합하지 않고 높은 온도에서 수 시간 동안 열처리를 수행해야 하므로 공정 시간 및 비용이 증가하게 된다는 단점이 있다. 따라서, 본 연구에서는 RF sputter를 이용하여 증착된 비정질 InGaZnO pesudo MOSFET 소자를 제작하였으며, thermal 열처리와 microwave 열처리 방식에 따른 전기적 특성을 비교 및 분석하고 각 열처리 방식의 열처리 온도 및 조건을 최적화하였다. P-type bulk silicon 위에 산화막이 100 nm 형성된 기판에 RF 스퍼터링을 이용하여 InGaZnO 분말을 각각 1:1:2mol% 조성비로 혼합하여 소결한 타겟을 사용하여 70 nm 두께의 InGaZnO를 증착하였다. 연속해서 Photolithography 공정과 BOE(30:1) 습식 식각 과정을 이용해 활성화 영역을 형성하여 소자를 제작하였다. 제작 된 소자는 pseudo MOSFET 구조이며, 프로브 탐침을 증착 된 채널층 표면에 직접 접촉시켜 소스와 드레인 역할을 대체하여 동작시킬 수 있어 전기적 특성을 간단하고 간략화된 공정과정으로 분석할 수 있는 장점이 있다. 열처리 조건으로는 thermal 열처리의 경우, furnace를 이용하여 각각 $300^{\circ}C$, $400^{\circ}C$, $500^{\circ}C$, $600^{\circ}C$에서 30분 동안 N2 가스 분위기에서 열처리를 실시하였고, microwave 열처리는 microwave를 이용하여 각각 400 W, 600 W, 800 W, 1000 W로 20분 동안 실시하였다. 그 결과, furnace를 이용하여 열처리한 소자와 비교하여 microwave 를 통해 열처리한 소자에서 subthreshold swing (SS), threshold voltage (Vth), mobility 등이 개선되는 것을 확인하였다. 따라서, microwave 열처리 공정은 향후 저온 공정을 요구하는 MOSFET 제작 시의 훌륭한 대안으로 사용 될 것으로 기대된다.

• Journal of the Korean Society for Precision Engineering
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• v.23 no.8 s.185
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• pp.171-177
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• 2006

This study was performed as a part of the research on the development of a maskless and electroless process for fabricating metal micro/nanostructures by using a nanoindenter and an electroless deposition technique. $2-{\mu}m$-deep indentation tests on Ni and Cu samples were performed. The elastic recovery of the Ni and Cu was 9.30% and 9.53% of the maximum penetration depth, respectively. The hardness and the elastic modulus were 1.56 GPa and 120 GPa for Ni and 1.51 GPa and 104 GPa for Cu. The effect of single-point diamond machining conditions such as the Berkovich tip orientation (0, 45, and $90^{\circ}$ ) and the normal load (0.1, 0.3, 0.5, 1, 3, and 5 mN), on both the deformation behavior and the morphology of cutting traces (such as width and depth) was investigated by constant-load scratch tests. The tip orientation had a significant influence on the coefficient of friction, which varied from 0.52-0.66 for Ni and from 0.46- 0.61 for Cu. The crisscross-pattern sample showed that the tip orientation strongly affects the surface quality of the machined are a during scratching. A selective deposition of Cu at the pit-like defect on a p-type Si(111) surface was also investigated. Preferential deposition of the Cu occurred at the surface defect sites of silicon wafers, indicating that those defect sites act as active sites for the deposition reaction. The shape of the Cu-deposited area was almost the same as that of the residual stress field.

• Steel and Composite Structures
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• v.49 no.3
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• pp.307-323
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• 2023

In this research, the study of the thermoelastic flexural analysis of silicon carbide/Aluminum graded (FG) sandwich 2D uniform structure (plate) under harmonic sinusoidal temperature load over time is presented. The plate is modeled using a simple two dimensional integral shear deformation plate theory. The current formulation contains an integral terms whose aim is to reduce a number of variables compared to others similar solutions and therefore minimize the computation time. The transverse shear stresses vary according to parabolic distribution and vanish at the free surfaces of the structure without any use of correction factors. The external load is applied on the upper face and varying in the thickness of the plates. The structure is supposed to be composed of "three layers" and resting on nonlinear visco-Pasternak's-foundations. The governing equations of the system are deduced and solved via Hamilton's principle and general solution. The computed results are compared with those existing in the literature to validate the current formulation. The impacts of the parameters (material index, temperature exponent, geometry ratio, time, top/bottom temperature ratio, elastic foundation type, and damping coefficient) on the dynamic flexural response are studied.

• Korean Journal of Materials Research
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• v.34 no.4
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• pp.202-207
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• 2024

In this study, we undertook detailed experiments to increase hydrogen production efficiency by optimizing the thickness of titanium dioxide (TiO₂) thin films. TiO₂ films were deposited on p-type silicon (Si) wafers using atomic layer deposition (ALD) technology. The main goal was to identify the optimal thickness of TiO₂ film that would maximize hydrogen production efficiency while maintaining stable operating conditions. The photoelectrochemical (PEC) properties of the TiO₂ films of different thicknesses were evaluated using open circuit potential (OCP) and linear sweep voltammetry (LSV) analysis. These techniques play a pivotal role in evaluating the electrochemical behavior and photoactivity of semiconductor materials in PEC systems. Our results showed photovoltage tended to improve with increasing thickness of TiO₂ deposition. However, this improvement was observed to plateau and eventually decline when the thickness exceeded 1.5 nm, showing a correlation between charge transfer efficiency and tunneling. On the other hand, LSV analysis showed bare Si had the greatest efficiency, and that the deposition of TiO₂ caused a positive change in the formation of photovoltage, but was not optimal. We show that oxide tunneling-capable TiO₂ film thicknesses of 1~2 nm have the potential to improve the efficiency of PEC hydrogen production systems. This study not only reveals the complex relationship between film thickness and PEC performance, but also enabled greater efficiency and set a benchmark for future research aimed at developing sustainable hydrogen production technologies.

• The Journal of Korean Academy of Prosthodontics
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• v.61 no.3
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• pp.179-188
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• 2023

Purpose. The purpose of this study was to evaluate the effect of surface treatments on the shear bond strength of two types of zirconia (3-TZP and 5Y-PSZ) with resin cement. Materials and methods. Two different types of zirconia specimens with a fully sintered size of 14.0×14.0×2.0 mm³ were prepared, polished with 400, 600, and 800 grit silicon carbide paper, and buried in epoxy resin. They were classified into four groups each control, sandblasting, primer, and sandblasting & primer. Cylindrical resin adhered to the surface-treated zirconia with resin cement. It was stored in distilled water (37℃) for 24 hours, and a shear bond strength test was performed. The normality of the experimental group was confirmed with the Kolmogorov-Smirnov & Shapiro-Wilk test. The interaction and statistical difference were analyzed using a two-way ANOVA. A post-hoc analysis was performed using Dunnett T3. Results. As a result of two-way ANOVA, there was no significant difference in shear bonding strength between zirconia types (P > .05), but there was a significant correlation in the sandblasting, primer, and alumina sandblasting & primer group (P < .05). Dunnett T3 post-test showed that, regardless of the type of zirconia, shear bonding strength was sandblasting & primer > Primer > sandblasting > control group (P < .05). Conclusion. There was no difference in shear bond strength between the types of zirconia. The highest shear bond strength was shown when the mechanical and chemical treatments of the zirconia surface was performed simultaneously.