• 전자공학회논문지A
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• 제30A권6호
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• pp.38-48
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• 1993

A recessed n-p Juction diode with the self-aligned sturcture is proposed and fabricated by using the polysilicon as an n$^{+}$ diffusion source. The diode structure can be applicable to the emitter-base formation of high performance bipolar divice and the n$^{+}$ polysilicone mitter has an important effect on the device characteristics. The considered parameters for the polysilicon formation are the deposition condition. As$^{+}$ dose for the doping of the polysilicon and the annealing condition using RTP system. The vertical depth profiles of the fabricated diode are obtained by SIMS and the electrical characteristics are analyzed in terms of the ideality factor of diode (n), contact resistance and reverse leakage current. In addition, n$^{+}$-p junction diodes are formed by using the amorphous silicon (of combination of amorphous and polysiliocn) instead of polysilicon and their characteristics are compared with those of the standard sample. The As$^{+}$ dose for the formation of good junction is about 1~2${\times}10^{16}cm^{2}$ at given RTA conditions (1100.deg. C, 10sec).

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1994년도 춘계학술대회 논문집
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• pp.152-153
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• 1994

A recessed $n^{+}$-p junction diode with the serf-aligned structure is proposed and fabricated by using the polysilicon as an $n^{+}$ diffusion source. The diode structure can be applicable to the emitter-base formation of high performance bipolar device and the $n^{+}$ polysilicon emitter has an important effect on the device characteristics. The considered parameters for the polysilicon formation are the deposition condition $As^{+}$ dose for the doping of the polysilicon, and the annealing using RTP system. The vertical depth profiles of the fabricated diode are obtained by SIMS. The eleotrical characteristics are analyzed in trims of the ideality factor of diode (n), contact resistance arid reverse leakage current. The $As_{+}$ dose for the formation of good junction is current. The $As^{+}$ dose for the formation of goodjunctions is about 1∼2${\times}$$10^{16}$$cm^{-2}$ at given RTA condition ($1100^{\circ}C$, 10 sec). The $n^{+}$-p structure is successfully applied to the self-aligned bipolar device adopting a single polysilicon technology.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1989년도 하계종합학술대회 논문집
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• pp.662-666
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• 1989

Pure mono Silane(Purity: 99.99%) was used as a thin film source and [$SiH_4$ + $H_2$ (5%)] + [$PH_3$ + $H_2$(0.05%)] mixed dilute gas was used for p-n junction diode. The substrate was P-type silicon wafer (p=$3{\Omega}$ cm) with the direction (100). The crystalline qualities of deposited thin film were investigated by the X-ray diffraction, RHEED and TED patterns and the voltampere characteristics of p-n junction diode was identified by I-V curve.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.2
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• pp.906-911
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• 2004

In this paper, we used only PR as etching mask, while it used usually Cr/AU as etching mask, and in order to fabricate a photosensor has the increased sensitivity, we investigated on the sensitivity of general type and p-i-n type diode. we designed microchannel size width max 10um, min 5um depth max 10um, reservoir size max 100um, min 2mm. Fabrication of microfluidic devices in glass substrate by glass wet etching methods and glass to glass fusion bonding. The p-i-n diode has higher sensitivity than photodiode. Considering these results, we fabricated p-i-n diodes on the high resistive($4k{\Omega}{\cdot}cm$) wafer into rectangle and finger pattern and compared internal resistance of each pattern. The internal resistance of p-i-n diode can be decreased by the application of finger pattern has parallel resistance structure from $571\Omega$ to $393\Omega$.

• 한국진공학회지
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• 제13권1호
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• pp.14-21
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• 2004

오늘날 전력소자의 작동에 고주파를 사용하기 때문에 에너지 손실을 줄이기 위해 전력소자의 스위칭 속도를 증가시키는 것은 필수적이다. 본 연구에서는 $p^+- n^-$ 접합 다이오드의 스위칭 속도를 증가시킬 목적으로 minority carrier의 수명을 감소시킬 수 있는 전자조사를 실시하였다. 다이오드의 전기적 성질에 대한 전자조사의 효과를 나타냈다. 스위칭 속도는 효과적으로 증가하였다. 또한 증가될 것으로 예상되는 접합 누설 전류와 전자조사 후 정전압강하는 최적 조건의 에너지와 dose량으로 조사된 $p^+- n^-$접합 다이오드에서는 무시할 수 있는 정도로 나타났다. DLTS와 C-V 분석은 실리콘 기판에서 전자조사로 감소된 결함은 0.284eV와 0.483eV의 에너지 준위를 갖는 donor-like 결함인 것을 보여준다. 본 연구에서의 실험 결과를 고려해 보면, 전자조사는 $p^+- n^-$ 접합 다이오드 전력 소자의 스위칭 속도를 증가시켜 에너지 손실을 감소시킬 수 있는 가장 유용한 기술이라고 결론지을 수 있다.

• 한국반도체및디스플레이장비학회:학술대회논문집
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• 한국반도체및디스플레이장비학회 2007년도 춘계학술대회
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• pp.179-182
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• 2007

Polycrystaline (poly) 3C-SiC thin film on n-type and p-type Si were deposited by APCVD using HMDS, $H_2$, and Ar gas at $1180^{\circ}C$ for 3 hour. And then the schottky diode with Au/poly 3C-Sic/Si(n-type) structure was fabricated. Its threshold voltage ($V_d$), breakdown voltage, thickness of depletion layer, and doping concentration ($N_D$) value were measured as 0.84 V, over 140 V, 61nm, and $2.7{\times}10^{19}\;cm^3$, respectively. The p-n junction diode fabricated by poly 3C-SiC was obtained like characteristics of single 3C-SiC p-n junction diode. Therefore, its poly 3C-SiC thin films are suitable MEMS applications in conjuction with Si fabrication technology.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2012년도 춘계학술발표대회
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• pp.87.1-87.1
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• 2012

넓은 밴드갭 (3.37eV)과 높은 엑시톤 결합에너지 (60meV)를 가지는 ZnO 물질은 ultra violet light 센서 및 light emitting diode (LED)의 재료로써 많은 연구가 진행되고 있다. 특히 나노와이어 구조를 이용하여 소자를 만들 경우 양자효과와 1차원적 캐리어 수송경로 효과로 인하여 그 특성을 보다 향상 시킬 수 있다. 나노와이어를 이용한 이종접합 p-n 다이오드를 제작하기 위하여 ZnO와 격자상수가 비슷한 GaN, NiO, CoO와 같은 물질들이 나노구조 접합에 많이 쓰이고 있지만, 격자상수 차이로 인해서 접합부분 캐리어 수송효율이 떨어지는 단점을 가지고 있다. n-type과 p-type ZnO를 만들어 동종 접합을 만들 경우 이러한 문제점을 극복할 수 있지만, 도핑되지 않은 ZnO가 n-type을 특성을 나타내기 때문에 안정적인 p-type ZnO 합성에 대한 연구가 필수적이다. 본 연구에서는 안정적인 p-type ZnO 합성을 위해서 수열합성법을 이용하여 phosphorus (P) 도핑을 하였고, 나노와이어 diode 구조를 만들었다. P 도핑으로 인한 격자상수 변화는 x-ray diffraction (XRD)를 사용하여 확인하였고, x-ray photoelectron spectroscopy (XPS)를 통해 도핑 원소를 분석하였으며, 이때의 recification ratio, turn-on voltage 등의 전기적 특성을 평가하였다.

• 한국전기전자재료학회논문지
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• 제13권11호
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• pp.908-913
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• 2000

CoSi$_2$/p+/n diodes(bilayer diodes) were fabricated by using epitaxial CoSi$_2$grown from Co/Ti bilayer as a diffusion source. The I-V characteristics of p+/n diodes were measured and compared with those of diode made from Co monolayer (monolayer diode). Monolayer diodes showed typical p+n junction characteristics with the leakage current of as low as 10$^{-12}$ A and forward current 6-orders higher than the leakage current, when drive-in annealed at 90$0^{\circ}C$ for 20 sec.. On the other hand, bilayer diodes showed the Schottky-like behaviors with forward currents rather higher than those of monolyer diodes, but with too high leakage currents, when drive-in annealed at $700^{\circ}C$ or higher. However, when the annealing temperature was lowered to $700^{\circ}C$ and annealing time was increased to 60 sec., the leakage current was reduced to 10$^{-11}$ A and thus sho3wed typical diode characteristics. The high leakage currents for diodes annealed at $700^{\circ}C$ or higher was attributed to Shannon contacts formed due to unremoved Co-Ti-Si precipitates. But when annealed at 50$0^{\circ}C$, B ions diffused in the direction of the surface layer, and thus the leakage currents were reduced by removing Shannon contacts.

• 대한전자공학회논문지SD
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• 제44권2호
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• pp.7-12
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• 2007

고휘도 LED(Light-Emitting Diode)를 구현하기 위한 칩 설계의 최적화에 이용할 수 있는 SPICE 기반의 LED 3차원 회로 모델을 개발하였다. 본 모델은 LED를 일정한 면적의 픽셀로 구획하고, 각각의 픽셀은 n-전극, n-형 반도체, p-형 반도체, 및 p-전극 등의 일반적인 LED 레이어 구조를 반영하는 회로망으로 나타낸다. 개별의 박막 층과 접촉 저항은 저항 네트웍으로, pn-접합부는 일반적인 pn-접합 다이오드로 각각 모델링 한다. 별도의 테스트 패턴을 이용하여 독립적으로 추출한 파라미터를 이용한 시뮬레이션 결과는 실험 결과와 정확하게 일치함을 확인하였다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 추계종합학술대회 논문집(2)
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• pp.225-228
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• 2000

In this paper, we demonstrated an analytical description method of forward voltage drop and reverse voltage of $P^{+}N$ junction diode with <111> oriented antimony doped silicon wafer 60keV boron implantation computer simulation results. In order to make electrical activation of implanted carriers, thermal annealing are carried out by RTP method for 1min at $1000^{\circ}C$ inert gas condition.