• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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• pp.1075-1078
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• 2007

Negative Bias Temperature Instability (NBTI) in Eximer Laser Annealing (ELA) based Low Temperature polysilicon (LTPS) Thin-Film Transistors (TFT) was investigated. Even though NBTI is generally appeared in devices with thin gate oxide, the TFT with gate oxide thickness of 120 nm, relatively thick, also showed NBTI effect and dynamic NBTI effect is dependent on operational frequency.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.1122-1125
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• 2006

The TFT performances were enhanced and stabilized by plasma oxidation of the polycrystalline Si surface prior to the plasma enhanced atomic layer deposition of $Al_2O_3$ gate dielectric film. We attribute the improvement to the formation of a high quality oxide interface layer between the gate dielectric film and the poly-Si film. The interface oxide has a predominant effect on the TFT's characteristics, and is regulated by the gap distance between the electrode and the polycrystalline Si surface.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2010년도 제39회 하계학술대회 초록집
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• pp.112-112
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• 2010

Zinc Oxide (ZnO) thin-films were deposited according to the magnetron sputtering method. The deposited ZnO films were annealed with RTA equipment at various annealing temperatures in an vacuum ambient. The influence of the annealing temperature on the structural, electrical, and optical properties of the ZnO films was experimentally investigated, and the effect of conductivity of the ZnO active layer on the device performance of the oxide-TFT was tested. As a result, an increase of the annealing temperature was attributed to improvements of crystallinity in ZnO films. The grain size was found to lead to an increase of conductivity in the ZnO films. Fabricated ZnO TFTs with annealed ZnO active layer provided good performance in the TFT devices. Consequently, the performance of the TFT was determined by the conductivity of the ZnO film, which was related to the structural properties of the ZnO film.

• Transactions on Electrical and Electronic Materials
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• 제16권4호
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• pp.187-189
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• 2015

A charge-trap flash (CTF) thin film transistor (TFT) memory is proposed at a low-temperature process (≤ 450℃). The memory cell consists of a sputtered oxide-nitride-oxide (ONO) gate dielectric and Schottky barrier (SB) source/drain (S/D) junctions using nickel silicide. These components enable the ultra-low-temperature process to be successfully achieved with the ONO gate stacks that have a substrate temperature of room temperature and S/D junctions that have an annealing temperature of 200℃. The silicidation process was optimized by measuring the electrical characteristics of the Ni-silicided Schottky diodes. As a result, the Ion/Ioff current ratio is about 1.4×10⁵ and the subthreshold swing and field effect mobility are 0.42 V/dec and 14 cm²/V·s at a drain voltage of −1 V, respectively.

• Transactions on Electrical and Electronic Materials
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• 제18권3호
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• pp.141-143
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• 2017

Novel structured thin film transistors (TFTs) of amorphous silicon zinc tin oxide (a-SZTO) were designed and fabricated with a thin metal layer between the source and drain electrodes. A SZTO channel was annealed at $500^{\circ}C$. A Ti/Au electrode was used on the SZTO channel. Metals are deposited between the source and drain in this novel structured TFTs. The mobility of the was improved from $14.77cm^2/Vs$ to $35.59cm^2/Vs$ simply by adopting the novel structure without changing any other processing parameters, such as annealing condition, sputtering power or processing pressure. In addition, stability was improved under the positive bias thermal stress and negative bias thermal stress applied to the novel structured TFTs. Finally, this novel structured TFT was observed to be less affected by back-channel effect.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2000년도 제1회 학술대회 논문집
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• pp.67-68
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• 2000

Polycrystalline silicon (poly-Si) thin film transistors (TFT's) employing vertical amorphous silicon (a-Si) offsets have been fabricated without additional photolithography processes. The a-Si offset has been formed utilizing the poly-Si grain growth blocking effect by thin native oxide film during the excimer laser recrystallization of a-Si. The ON current degradation of the new device after 4 hour's electrical stress was reduced by 5 times compared with conventional poly-Si TFT's.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.1040-1043
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• 2009

a-IGZO is an attractive material to make an AMOLED device with uniform TFT properties for use in a large size display. However, this material shows TFT properties that are very sensitive to water or hydrogen. Therefore, it is essential to control these critical factors during fabrication of the backplane in order to improve the TFT performance. In this paper, we report the effect of passivation layer properties on the performance of the oxide TFTs.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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• pp.215.2-215.2
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• 2015

We fabricated dual active layer (DAL) thin film transistors (TFTs) with indium tin zinc oxide (ITZO) and indium gallium zinc oxide (IGZO) thin film layers using solution process. The ITZO and IGZO layer were used as the front and back channel, respectively. In order to investigate the bias stress stability of ITZO SAL (single active layer) and ITZO/IGZO DAL TFT, a gate bias stress of 10 V was applied for 1500 s under the dark condition. The SAL TFT composed of ITZO layer shows a poor positive bias stability of ${\delta}VTH$ of 13.7 V, whereas ${\delta}VTH$ of ITZO/IGZO DAL TFT was very small as 2.6 V. In order to find out the evidence of improved bias stress stability, we calculated the total trap density NT near the channel/gate insulator interface. The calculated NT of DAL and SAL TFT were $4.59{\times}10^{11}$ and $2.03{\times}10^{11}cm^{-2}$, respectively. The reason for improved bias stress stability is due to the reduction of defect sites such as pin-hole and pores in the active layer.

• 한국전기전자재료학회논문지
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• 제36권5호
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• pp.463-473
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• 2023

In recent years, the transparent amorphous oxide thin film transistor represented by indium-gallium-zinc-oxide (IGZO) has become the first choice of the next generation of integrated circuit control components. This article contributes an overview of IGZO thin-film transistors (TFTs), including their fundamental principles and recent advancements. The paper outlines various TFT structures and places emphasis on the fabrication process of the active layer. The result showed that the size of the active layer including the length-to-width ratio and the width could have a significant effect on the mobility. And the process of TFT could influence the crystal structure of IGZO thin film. Furthermore, the article presents an overview of recent applications of IGZO TFTs, such as their use in display drivers and TFT memories. At last, the future development of IGZO TFT is forecasted in this paper.

• Transactions on Electrical and Electronic Materials
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• 제16권5호
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• pp.234-240
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• 2015

Amorphous oxide-based thin-film transistors (TFTs) have drawn a lot of attention recently for the next-generation high-resolution display industry. The required field-effect mobility of oxide-based TFTs has been increasing rapidly to meet the demands of the high-resolution, large panel size and 3D displays in the market. In this regard, the current status and major trends in the high mobility oxide-based TFTs are briefly reviewed. The various approaches, including the use of semiconductor, dielectric, electrode materials and the corresponding device structures for realizing high mobility oxide-based TFT devices are discussed.