• Title/Summary/Keyword: optical chip

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A numerical study on the residual stress in LED encapsulment silicone considering cure process (경화공정을 고려한 LED 패키징 실리콘의 잔류음력에 대한 수치해석적 고찰)

  • Song, M.J.;Kim, K.B.;Kang, J.J.;Kim, H.K.
    • Proceedings of the Korean Society for Technology of Plasticity Conference
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    • 2009.10a
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    • pp.323-327
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    • 2009
  • Silicone is recently used for LED chip encapsulment due to its good thermal stability and optical transmittance. In order to predict residual stress which causes optical briefringence and mechanical warpage of silicone, finite element analysis was conducted for both curing and cooling process during silicone molding. For analysis of curing process, a cure kinetics model was derived based on the differential scanning calorimetry(DSC) test and applied to the material properties for finite element analysis. Finite element simulation result showed that the curing as well as the cooling process should be designed carefully so as to reduce the residual stress although the cooling process plays the bigger role than curing process in determining the final residual stress state.

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Butterfly type 광패키지의 제작 및 특성 평가

  • 조현민;유찬세;강남기;이승익;한기우;유명기
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2001.11a
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    • pp.111-114
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    • 2001
  • Optical transmitter and receiver are the essential components for optical communication. For these components, butterfly type packages are used which are comprised of metal housing, multilayer ceramic inserts, lead and window. In this study, 2.5 Gbps DFB(Distributed -Feedback) LD(Laser Diode) package was fabricated and characterized. Metal housing showed good thermal conductivity (200W/mK) and well matched TCE(6.7ppm/K) with GaAs chip. Ceramic inserts also showed good VSWR(Voltage Standing Wave Ratio) characteristics(<2.0). By brazing technology, all the elements were combined and sealed. RF characteristics of the package mounted on the PWB was also tested.

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A study on the small Flash Lamp Design using LED (휴대폰용 소형 Flash에 적합한 LED 램프 설계 연구)

  • Jeong, Hak-Geun;Jung, Bong-Man;Han, Su-Bin;Park, Suk-In;Song, Yu-Jin;Lee, Jeong-Hoon
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2007.11a
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    • pp.107-109
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    • 2007
  • LED is expected as an environmentally friendly light source with its good reliability and long lifetime. A few ten mW white LED can substitute for the indicator light source, and it is required to study several watt multi-chip semiconductor light sources in order to replace the light sources for general illumination such as incandescent lights and fluorescent lamps. Since the optical technology used for several mW white LED light source uses only 30% to 50% of the light, it is required to develop the design technology of optical system and lens to improve the efficiency more than 80% for insuring the high power of white LED. In this paper, we designed and fabricated new structure reflector to increase the efficiency.

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The Design of 6 inch Down-light by Optimization of the Optical and the Thermal Properties (광학적 열적 최적화를 통한 6인치 다운라이트 설계)

  • Kim, Sung-Hyun;Joung, Young-Gi;Seo, Bum-Sik;Yang, Jong-Kyung;Park, Dae-Hee
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.60 no.6
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    • pp.1178-1182
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    • 2011
  • The best methods for distribution controled of LED lighting fixtures is control to designed LED chip array, lens and reflector. However, lens design need distribution design to reflector for low-wattage LED lighting because of difficulty of production and reduction of light efficiency. In addition, it needs maximize of thermal performance to improve the efficiency and reliability of device. As a result, for the height of reflector 40[mm] and Inclination 25[$^{\circ}$], we can see the best distribution properties, and, in the thermal properties, junction temperature MCPCB 62.9 [$^{\circ}C$], FR4 PCB 89.6 [$^{\circ}C$], FR4 PCB from Via-hole is 63.1 [$^{\circ}C$]. it may improve for thermal properties for makes the Via-hole.

3D Holographic Image Recognition by Using Graphic Processing Unit

  • Lee, Jeong-A;Moon, In-Kyu;Liu, Hailing;Yi, Faliu
    • Journal of the Optical Society of Korea
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    • v.15 no.3
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    • pp.264-271
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    • 2011
  • In this paper we examine and compare the computational speeds of three-dimensional (3D) object recognition by use of digital holography based on central unit processing (CPU) and graphic processing unit (GPU) computing. The holographic fringe pattern of a 3D object is obtained using an in-line interferometry setup. The Fourier matched filters are applied to the complex image reconstructed from the holographic fringe pattern using a GPU chip for real-time 3D object recognition. It is shown that the computational speed of the 3D object recognition using GPU computing is significantly faster than that of the CPU computing. To the best of our knowledge, this is the first report on comparisons of the calculation time of the 3D object recognition based on the digital holography with CPU vs GPU computing.

Sub-Micrometer-Sized Spectrometer by Using Plasmonic Tapered Channel-Waveguide

  • Lee, Da Eun;Lee, Tae-Woo;Kwon, Soon-Hong
    • Journal of the Optical Society of Korea
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    • v.18 no.6
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    • pp.788-792
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    • 2014
  • It has been a critical issue to reduce the size of spectrometers in many fields such as on-chip chemical and biological sensing. The proposed plasmonic channel-waveguide with a sub-micrometer width has a cutoff frequency which enables us to control wavelength dependent propagation properties. We focused on the capability of the waveguide for spectral-to-spatial mapping when the waveguide width changes gradually. In this paper, we propose a plasmonic tapered channel-waveguide structure as a compact spectrometer with a physical size of $0.24{\times}2.0{\times}0.20{\mu}m^3$. The scattering point just above the tapered waveguide moves linearly depending on the wavelength of the injecting light. The spectral-to-spatial mapping can be improved by increasing the tapered length.

A 4-Channel 6.25-Gb/s/ch VCSEL Driver for HDMI 2.0 Active Optical Cables

  • Hong, Chaerin;Park, Sung Min
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.4
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    • pp.561-567
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    • 2017
  • This paper presents a 4-channel common-cathode VCSEL driver array operating up to 6.25 Gb/s per channel for the applications of HDMI 2.0 active optical cables. The proposed VCSEL driver consists of an input buffer, a modified Cherry-Hooper amplifier as a pre-driver, and a main driver with pre-emphasis to drive a common-cathode VCSEL diode at high-speed full switching operations. Particularly, the input buffer merges a linear equalizer not only to broaden the bandwidth, but to reduce power consumption simultaneously. Measured results of the proposed 4-channel VCSEL driver array implemented in a $0.13-{\mu}m$ CMOS process demonstrate wide and clean eye-diagrams for up to 6.25-Gb/s operation speed with the bias current 2.0 mA and the modulation currents of $3.1mA_{PP}$. Chip core occupies the area of $0.15{\times}0.1{\mu}m^2$ and dissipate 22.8 mW per channel.

Cutting Chip and Surface Roughness in Micro Groove Cutting of Brass (황동의 Micro Groove 가공시 절삭칩과 표면거칠기)

  • Min, Kyung Tak;Jang, Ho Su
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.9 no.4
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    • pp.1-7
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    • 2010
  • Recently optical and electric and electronic forms in the field of ultra fine patterns has been used extensively, and techniques of the optical parts are required that can precision-machine this micro-patterns such as V or R-shaped micro-groove patterns. In this study, V and R type, shaping the way micro groove brass machining process to characterize the material feed rate and cutting depth and the V and R as a variable brother, using two kinds of diamond tools for each picture shape and surface roughness caused by conditions such as chips, processed through the analysis of effects of geometry and analysis such as precision machining.

A Study on Machine Vision System and Camera Modeling with Geometric Distortion (기하학적 왜곡을 고려한 카메라 모델링 및 머신비젼 시스템에 관한 연구)

  • 계중읍
    • Journal of the Korean Society of Manufacturing Technology Engineers
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    • v.7 no.4
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    • pp.64-72
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    • 1998
  • This paper a new approach to the design of machine vision technique with a camera modeling that accounts for major sources of geometric distortion, namely, radial, decentering, and thin prism distortion. Radial distortion causes an inward or outward displacement of a given image point from its ideal location. Actual optical systems are subject to various degrees of decentering , that is , the optical centers of lens design and manufacturing as well as camera assembly. It is our propose to develop the vision system for the pattern recognition and the automatic test of parts and to apply the line of manufacturing. The performance of proposed vision system is illustrated by simulation and experiment.

3D Accuracy Enhancement of BGA Shiny Round Ball Using Optical Triangulation Method (광삼각법을 이용한 고반사 BGA 볼의 정밀 높이 측정 방법)

  • Joo, Byeong Gwon;Cho, Taik Dong
    • Journal of the Korean Society for Precision Engineering
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    • v.32 no.9
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    • pp.799-805
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    • 2015
  • The further development of information, communication and digital media technologies requires the use of advanced, miniaturized semiconductor chips that operate at a high frequency. Die bonding and wire bonding methods for semiconductor packaging have been replaced by direct attachment to the substrate after forming a bump on the chip. However, the height of the bump or ball is an important factor for defects during assembly. This paper proposes an algorithm to measure the height of the bumps or balls in semiconductor packaging with greater accuracy. The performance of the proposed algorithm is experimentally validated. Non-contact 3D measurements of a shiny round ball is quite difficult, and it is not easy to obtain accurate data. This paper thus proposes an optical method and technique to improve the measurement accuracy.