• Electrical & Electronic Materials
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• v.9 no.10
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• pp.1001-1007
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• 1996

The conduction mechanisms of the off-current in low temperature (.leq. >$600^{\circ}C$) processed polycrystalline silicon thin film transistors (LTP poly-Si TFT'S) have been systematically studied. Especially, the temperature and bias dependence of the off-current between hydrogenated and nonhydrogenated poly-Si TFT's were investigated and compared. The off-current of nonhydrogenated poly-Si TF's is because of a resistive current at low gate and drain voltage, thermally activated current at high gate and low drain voltage, and Poole-Frenkel emission current in the depletion region near the drain at high gate and drain voltage. After hydrogenation it has shown that the off -current mechanism is caused mainly by thermal activation and that the field-induced current component is suppressed.

• Journal of IKEEE
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• v.23 no.1
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• pp.29-34
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• 2019

We investigated on-off voltage ${\Delta}V_{on-off}$ of sub-10 nm JLCSG (Junctionless Cylindrical Surrounding Gate) MOSFET. The gate voltage was defined as ON voltage for the subthreshold current of $10^{-7}A$ and OFF voltage for the subthreshold current of $10^{-12}A$, and the difference between ON and OFF voltage was obtained. Since the tunneling current was not negligible at 10 nm or less, we observe the change of ${\Delta}V_{on-off}$ depending on the presence or absence of the tunneling current. For this purpose, the potential distribution in the channel was calculated using the Poisson equation and the tunneling current was calculated using the WKB approximation. As a result, it was found that ${\Delta}V_{on-off}$ was increased due to the tunneling current in JLCSG MOSFETs below 10 nm. Especially, it increased rapidly with channel lengths less than 8 nm and increased with increasing channel radius and oxide thickness.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1996.05a
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• pp.90-93
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• 1996

The conduction mechanisms of the off-current in low temperature ($\leq$600$^{\circ}C$) processed polycrystalline silicon thin film transistors (LTP poly-Si TFT's) has been systematically studied. Especially, the temperature and bias dependence of the off-current between unpassivated and passivated poly-Si TFT's was investigated and compared. The off-current of unpassivated poly-Si TFT's is due to a resistive current at low gate and drain voltage, thermal emission current at high gate, low drain voltage, and field enhanced thermal emission current in the depletion region near the drain at high gate and drain voltage. After hydrogenation, it was observed that the off-currents were remarkably reduced by plasma-hydrogenation. It was also observed that the off-currents of the passivated poly-Si TFT's are more critically dependent on temperature rather than electric field.

• Journal of Power Electronics
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• v.18 no.2
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• pp.375-382
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• 2018

A novel active controlled primary current cutting-off zero-voltage and zero-current switching (ZVZCS) PWM three-level dc-dc converter (TLC) is proposed in this paper. The proposed converter has some attractive advantages. The OFF voltage on the primary switches is only Vin/2 due to the series connected structure. The leading-leg switches can obtain zero-voltage switching (ZVS), and the lagging-leg switches can achieve zero-current switching (ZCS) in a wide load range. Two MOSFETs, referred to as cutting-off MOSFETs, with an ultra-low on-state resistance are used as active controlled primary current cutting-off components, and the added conduction loss can be neglected. The added MOSFETs are switched ON and OFF with ZCS that is irrelevant to the load current. Thus, the auxiliary switching loss can be significantly minimized. In addition, these MOSFETs are not series connected in the circuit loop of the dc input bus bar and the primary switches, which results in a low parasitic inductance. The operation principle and some relevant analyses are provided, and a 6-kW laboratory prototype is built to verify the proposed converter.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.3
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• pp.575-580
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• 2015

Asymmetric double gate(DG) MOSFET is a novel transistor to be able to reduce the short channel effects. This paper has analyzed a off current for conduction path of asymmetric DGMOSFET. The conduction path is a average distance from top gate the movement of carrier in channel happens, and a factor to change for oxide thickness of asymmetric DGMOSFET to be able to fabricate differently top and bottom gate oxide thickness, and influenced on off current for top gate voltage. As the conduction path is obtained and off current is calculated for top gate voltage, it is analyzed how conduction path influences on off current with parameters of oxide thickness and channel length. The analytical potential distribution of series form is derived from Poisson's equation to obtain off current. As a result, off current is greatly changed for conduction path, and we know threshold voltage and subthreshold swing are changed for this reasons.

• Proceedings of the KIEE Conference
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• 2015.07a
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• pp.944-945
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• 2015

Many sensitive loads always rely on UPS systems to maintain continuous power during abnormal utility power conditions. As any disturbance occurs at the utility side, an off-line UPS system takes over the load within a quarter cycle to avoid a blackout. However, the starting of the inverter can root the momentous inrush current for the transformer installed before the load, due to its magnetic saturation. The consequences of this current can be a reduction of line voltage and tripping of protective devices of the UPS system. Furthermore, it can also damage the transformer and decrease its lifetime by increasing the mechanical stresses on its windings. To prevent the inrush current, and to avoid its disruptive effects, this paper proposes an off-line UPS system that eliminates the inrush current phenomenon while powering the transformer coupled loads, using a current regulated voltage source inverter (CRVSI) instead of a typical voltage source inverter (VSI). Simulations have been performed to validate the operation of proposed off-line UPS system.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.10
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• pp.2403-2408
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• 2013

This paper has analyzed the change of forward and backward current for channel doping concentration to analyze off-current of double gate(DG) MOSFET. The Gaussian function as channel doping distribution has been used to compare with experimental ones, and the two dimensional analytical potential distribution model derived from Poisson's equation has been used to analyze the off-current. The off-current has been analyzed for the change of projected range and standard projected range of Gaussian function with device parameters such as channel length, channel thickness, gate oxide thickness and channel doping concentration. As a result, this research shows the off-current has greatly influenced on forward and backward current for device parameters, especially for the shape of Gaussian function for channel doping concentration.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.417-420
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• 1998

In this paper the formation mechanism of tail current is analyzed and its effect on GTO turn-off performance is given. The conclusion is that the large tail current will considerably increase the turn-off loss $E_{off}$ and cause the re-triggering during GTO's off-switching, therefore the best design criterion is that the tail current of power GTO must be as low as possible.w as possible.

• Journal of Power Electronics
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• v.19 no.2
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• pp.353-362
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• 2019

To address the problem of circulating current loss in the traditional zero-current switching (ZCS) full-bridge (FB) DC/DC converter, a ZCS FB DC/DC converter topology and modulation strategy is proposed in this paper. The strategy can achieve ZCS turn on and zero-voltage and zero-current switching (ZVZCS) turn off for the primary switches and realize ZVZCS turn on and zero-voltage switching (ZVS) turn off for the auxiliary switches. Moreover, its resonant circuit power is small. Compared with the traditional phase shift full-bridge converter, the new converter decreases circulating current loss and does not increase the current stress of the primary switches and the voltage stress of the rectifier diodes. The diodes turn off naturally when the current decreases to zero. Thus, neither reverse recovery current nor loss on diodes occurs. In this paper, we analyzed the operating principle, steady-state characteristics and soft-switching conditions and range of the converter in detail. A 740 V/1 kW, 100 kHz experimental prototype was established, verifying the effectiveness of the converter through experimental results.

• Journal of Magnetics
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• v.17 no.4
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• pp.298-301
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• 2012

In order to know the effect of surface irregularity in the detection of local wall thinning of pipeline using pulsed eddy current (PEC), the lift-off effects on PEC signal have been investigated. Three kinds of parameters in the PEC signal, which is "peak amplitude", "time to peak amplitude" and "time to zero crossing" are analyzed to separate the lift-off effects in the PEC signal. The distance from sensor to the bottom of sample which is the total thickness of combined insulator and sample is kept constant. The magnitude of the differential peak amplitude is increased with increasing sample thickness, the time to peak amplitude is increased with increasing the sample thickness. To determine the effect of lift-off, a number of balanced transient responses combining wall thinning locations and lift-off distances were plotted.