• Title/Summary/Keyword: n-MOSFET

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Comparative Study of Thermal Annealing and Microwave Annealing in a-InGaZnO Used to Pseudo MOSFET

  • Mun, Seong-Wan;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.08a
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    • pp.241.2-241.2
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    • 2013
  • 최근, 비정질 산화물 반도체 thin film transistor (TFT)는 수소화된 비정질 실리콘 TFT와 비교하여 높은 이동도와 큰 on/off 전류비, 낮은 구동 전압을 가짐으로써 빠른 속도가 요구되는 차세대 투명 디스플레이의 TFT로 많은 연구가 진행되고 있다. 한편, 기존의 MOSFET 제작 시 우수한 박막을 얻기 위해서는 $500^{\circ}C$ 이상의 높은 열처리 온도가 필수적이며 이는 유리 기판과 플라스틱 기판에 적용하는 것이 적합하지 않고 높은 온도에서 수 시간 동안 열처리를 수행해야 하므로 공정 시간 및 비용이 증가하게 된다는 단점이 있다. 따라서, 본 연구에서는 RF sputter를 이용하여 증착된 비정질 InGaZnO pesudo MOSFET 소자를 제작하였으며, thermal 열처리와 microwave 열처리 방식에 따른 전기적 특성을 비교 및 분석하고 각 열처리 방식의 열처리 온도 및 조건을 최적화하였다. P-type bulk silicon 위에 산화막이 100 nm 형성된 기판에 RF 스퍼터링을 이용하여 InGaZnO 분말을 각각 1:1:2mol% 조성비로 혼합하여 소결한 타겟을 사용하여 70 nm 두께의 InGaZnO를 증착하였다. 연속해서 Photolithography 공정과 BOE(30:1) 습식 식각 과정을 이용해 활성화 영역을 형성하여 소자를 제작하였다. 제작 된 소자는 pseudo MOSFET 구조이며, 프로브 탐침을 증착 된 채널층 표면에 직접 접촉시켜 소스와 드레인 역할을 대체하여 동작시킬 수 있어 전기적 특성을 간단하고 간략화된 공정과정으로 분석할 수 있는 장점이 있다. 열처리 조건으로는 thermal 열처리의 경우, furnace를 이용하여 각각 $300^{\circ}C$, $400^{\circ}C$, $500^{\circ}C$, $600^{\circ}C$에서 30분 동안 N2 가스 분위기에서 열처리를 실시하였고, microwave 열처리는 microwave를 이용하여 각각 400 W, 600 W, 800 W, 1000 W로 20분 동안 실시하였다. 그 결과, furnace를 이용하여 열처리한 소자와 비교하여 microwave 를 통해 열처리한 소자에서 subthreshold swing (SS), threshold voltage (Vth), mobility 등이 개선되는 것을 확인하였다. 따라서, microwave 열처리 공정은 향후 저온 공정을 요구하는 MOSFET 제작 시의 훌륭한 대안으로 사용 될 것으로 기대된다.

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Design and Implementation of Phase-Shifted Full-Bridge DC-DC Converter Using GaN FET (GaN FET을 적용한 위상천이 풀브릿지 DC-DC 컨버터의 설계 및 구현)

  • Kim, Dong-Sik;Joo, Dong-Myoung;Lee, Byung-Kuk;Kim, Jong-Soo
    • Proceedings of the KIPE Conference
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    • 2014.11a
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    • pp.19-20
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    • 2014
  • 기존의 실리콘 반도체를 대체할 것으로 기대되는 차세대 전력 반도체인 GaN FET을 이용한 위상천이 풀브릿지 dc-dc 컨버터의 설계 및 구현에 대해 기술한다. 600W급 프로토타입 dc-dc 컨버터를 대상으로 실리콘 MOSFET와 GaN FET의 스위칭 특성 및 효율 등을 비교 분석한다.

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Design of 26GHz Variable-N Frequency Divider for RF PLL (RF PLL용 26GHz 가변 정수형 주파수분할기의 설계)

  • Kim, Ho-Gil;Chai, Sang-Hoon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.49 no.9
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    • pp.270-275
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    • 2012
  • This paper describes design of a variable-N frequency synthesizer for RF PLL with $0.13{\mu}m$ silicon CMOS technology being used as an application of the UWB system like MBOA. To get good performance of speed and noise super dynamic circuits was used, and to get variable-N division ratio MOSFET switching circuits was used. Especially to solve narrow bandwidth problem of the dynamic circuits load resistance value of unit divider block was varied. Simulation results of the designed circuit shows very fast and wide operation characteristics as 5~26GHz frequency range.

Process Characteristics of Thin Dielectric at MOS Structure (MOS 구조에서 얇은 유전막의 공정 특성)

  • Eom, Gum-Yong;Oh, Hwan-Sool
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.11a
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    • pp.207-209
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    • 2004
  • Currently, for satisfying the needs of scaled MOSFET's a high quality thin oxide dielectric is desired because the properties of conventional $SiO_2$ film are not acceptable for these very small sized transistors. As an alternative gate dielectric have drawn considerable alternation due to their superior performance and reliability properties over conventional $SiO_2$, to obtain the superior characteristics of ultra thin dielectric films, $N_2O$ grown thin oxynitride has been proposed as a dielectric growtuanneal ambient. In this study the authors observed process characteristics of $N_2O$ grown thin dielectric. In view points of the process characteristics of MOS capacitor, the sheet resistance of 4.07$[\Omega/sq.]$, the film stress of $1.009e^{10}[dyne/cm^2]$, the threshold voltage$(V_t)$ of 0.39[V], the breakdown voltage(BV[V]) of 11.45[V] was measured in PMOS. I could achieve improved electrical characteristics and reliability for deep submicron MOSFET devices with $N_2O$ thin oxide.

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70nm NMOSFET Fabrication with Ultra-shallow $n^{+}-{p}$ Junctions Using Low Energy $As_{2}^{+}$ Implantations (낮은 에너지의 $As_{2}^{+}$ 이온 주입을 이용한 얕은 $n^{+}-{p}$ 접합을 가진 70nm NMOSFET의 제작)

  • Choe, Byeong-Yong;Seong, Seok-Gang;Lee, Jong-Deok;Park, Byeong-Guk
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.2
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    • pp.95-102
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    • 2001
  • Nano-scale gate length MOSFET devices require extremely shallow source/drain eftension region with junction depth of 20∼30nm. In this work, 20nm $n^{+}$-p junctions that are realized by using this $As_{2}^{+}$ low energy ($\leq$10keV) implantation show the lower sheet resistance of the $1.0k\Omega$/$\square$ after rapid thermal annealing process. The $As_{2}^{+}$ implantation and RTA process make it possible to fabricate the nano-scale NMOSFET of gate length of 70nm. $As_{2}^{+}$ 5 keV NMOSFET shows a small threshold voltage roll-off of 60mV and a DIBL effect of 87.2mV at 100nm gate length devices. The electrical characteristics of the fabricated devices with the heavily doped and abrupt $n^{+}$-p junctions ($N_{D}$$10^{20}$$cm^{-3}$, $X_{j}$$\leq$20nm) suggest the feasibility of the nano-scale NMOSFET device fabrication using the $As_{2}^{+}$ low energy ion implantation.

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Emission Characteristics of 0.7' Monochrome MOSFET-Controlled Field Emission Display in a High Vacuum Chamber

  • Lee, Jong-Duk;Oh, Chang-Woo;Kim, Il-Hwan;Park, Jae-Woo;Park, Byung-Gook
    • Journal of Information Display
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    • v.2 no.3
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    • pp.66-71
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    • 2001
  • MCFEDs (MOSFET-Contoolled Field Emission Displays) were fabricated to evaluate the validity of MCFEA for display application. The electrical properties of FEAs (Field Emitter Arrays), HVMOSFETs (High-Voltage MOSFETs), and MCFEAs (MOSFET-Controlled Field Emitter Arrays) were measured. The extraction gate voltage of the FEAs to obtain the anode current of 10 nA/tip was around 71 V. The breakdown voltages of the HVMOSFETs were above 81 V for all the samples. The I-V characteristics of the MCFEAs showed that the emission currents of the FEAs were well controlled depending on the control gate voltages of the HVMOSFETs. To avoid the harmful effects during the packaging process, the performance of the MCFEDs was evaluated in a high vacuum chamber. The emission images of the MCFEDs were controlled through very-through operation. From the comparison with a conventional FED, it was proven that the poor uniformity of FED could be improved through the integration with HVMOSFET.

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An Electronic Starter Using MOSFET for Fluorescent Lamps (MOSFET를 사용한 형광램프용 전자식 스타터)

  • Jung, Y.C.;Gwak, J.Y.;Lee, D.H.;Park, G.C.;Yeo, I.S.
    • Proceedings of the KIEE Conference
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    • 1997.07f
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    • pp.2075-2077
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    • 1997
  • An electronic starter using MOSFET is developed to take advantage of ideal preheating and starting features which can extend the lifetime of fluorescent lamps. The preheating curcuit of the developed electronic starter is consisted of three parts - a full wave rectifier curcuit, an FET switching curcuit, and a timer curcuit for the gate switching. The curcuit allows sufficient preheating current flow before the starting to protect lamp filaments, nevertheless it shortens the Preheating time and enables a single pulse ignition at the peak level of the line voltage. Experimental results show that fluorescent lamps of 20-40W range can be initiated within rather short time of $1{\sim}1.5sec$ with preheating current of 0.6A. The electronic starter withstands more than 70.000 cycles switchings without noticeable blackening due to anode spot. These features provide Proper evidences for the advantage of direct replacement with the new starter.

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High voltage MOSFET fabricated by using a standard CMOS logic process to drive the top emission OLEDs in silicon-based OELDs

  • Lee, Cheon-An;Kwon, Hyuck-In;Jin, Sung-Hun;Lee, Chang-Ju;Lee, Myung-Won;Kyung, Jae-Woo;Cho, Il-Whan;Lee, Jong-Duk;Park, Byung-Gook
    • 한국정보디스플레이학회:학술대회논문집
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    • 2003.07a
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    • pp.981-983
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    • 2003
  • Using the conventional standard CMOS logic process, the high voltage MOSFET to drive top emission OLEDs was fabricated for the silicon-based organic electroluminescent display. The drift region of the conventional high voltage MOSFET was implemented by the n-well of the logic process. The measurement result shows a good saturation characteristic up to 50 V without breakdown phenomena.

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Field Effect Transistors for Biomedical Application (전계효과트랜지스터의 생명공학 응용)

  • Sohn, Young-Soo
    • Applied Chemistry for Engineering
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    • v.24 no.1
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    • pp.1-9
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    • 2013
  • As the medical paradigm is changing from disease treatment to disease prevention and an early diagonosis, the demand to develop techniques for the detection of minute concentrations of biomolecules is increasing. Among the various techniques to sense the minute concentration of biomolecules, the biosensors utilizing the matured semiconductor techniques are presented here. To understand such biosensors, the structure and working principle of a MOSFET (Metal-oxide-semiconductor field-effect transistor) which is the basic semiconductor device is firstly introduced, and then the ISFET (Ion sensitive FET), BioFET (Biologically modified FET), Nanowire FET, and IFET (Ionic FET) are introduced, and their applications to biomedical fields are discussed.

Design and Optimization of 4.5 kV 4H-SiC MOSFET with Current Spreading Layer (Current Spreading Layer를 도입한 4.5 kV 4H-SiC MOSFET의 설계 및 최적화)

  • Young-Hun, Cho;Hyung-Jin, Lee;Hee-Jae, Lee;Geon-Hee, Lee;Sang-Mo, Koo
    • Journal of IKEEE
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    • v.26 no.4
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    • pp.728-735
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    • 2022
  • In this work, we investigated a high-voltage (~4.5 kV) 4H-SiC power DMOSFET with modifications of current spreading layer (CSL), which was introduced below the p-well region for low on-resistance. These include the following: 1) a thickness of CSL (TCSL) from 0 um to 0.9 um; 2) a doping concentration of CSL (NCSL) from 1×1016 cm-3 to 5×1016 cm-3. The design is optimized using TCAD 2D-simulation, and we found that CSL helps to reduce specific on-resistance but also breakdown voltage. The resulting structures exhibit a specific on-resistance (Ron,sp) of 59.61 mΩ·cm2, a breakdown voltage (VB) of 5 kV, and a Baliga's Figure of Merit (BFOM) of 0.43 GW/cm2.