• JSTS:Journal of Semiconductor Technology and Science
• /
• 제15권3호
• /
• pp.381-389
• /
• 2015

A fully integrated multistandard multiband CMOS mobile TV tuner with small silicon area and low power consumption is proposed for receiving multiple mobile digital TV signals and FM signal. In order to reduce the silicon area of the multistandard multiband receiver, other RF front-end circuits except LNAs are shared and a local oscillator (LO) signal generation architecture with a single VCO for a frequency synthesizer is proposed. To reduce the low frequency noise and the power consumption, a vertical NPN BJT is used in an analog baseband circuits. The RF tuner IC is implemented in a $0.18-{\mu}m$ CMOS technology. The RF tuner IC satisfies all specifications for DVB-H/T, T-DMB, and ISDB-T with a sufficient margin and a successful demonstration has been carried out for DVB-H/T, T-DMB, and ISDB-T with a digital demodulator.

• ETRI Journal
• /
• 제33권2호
• /
• pp.169-175
• /
• 2011

This paper presents a double-sharpened decimation filter based on the application of a Kaiser and Hamming sharpening technique for multistandard wireless systems. The proposed double-sharpened decimation filter uses a pre-droop compensator which improves the passband response of a conventional cascaded integrator-comb filter so that it provides an efficient sharpening performance at half-speed with comparison to conventional sharpened filters. In this paper, the passband droop characteristics with compensation provides -1.6 dB for 1.25 MHz, -1.4 dB for 2.5 MHz, -1.3 dB for 5 MHz, and -1.0 dB for 10 MHz bandwidths, respectively. These results demonstrate that the proposed double-sharpened decimation filter is suitable for multistandard wireless applications.

• 대한전자공학회논문지TC
• /
• 제44권3호
• /
• pp.78-84
• /
• 2007

WCDMA, WiBro, 그리고 802.11a/b/g 등의 여러 표준에 사용가능한 직접 변환 주파수 변환기를 0.18 um CMOS 공정을 이용하여 설계 하였다. 여러 표준을 수용하기 위한 방법으로 스위칭이 가능한 인덕터를 매칭의 방법으로 사용하여 칩의 크기를 줄일 수 있었다. 매칭 네트워크 안에서 스위치 트랜지스터를 켜고 끔에 따라 주파수 변환기의 동작주파수가 결정된다. 이 때, 스위치의 기생성분들이 주파수 변환기의 성능과 동작 주파수 선택에 큰 영향을 미치기 때문에 기생성분의 영향을 최소화하는 스위치 너비로 매칭회로를 구성했다. 제안된 주파수 변환기는 $2.1\sim2.5GHz$ 대역과 $5.1\sim5.9GHz$ 대역 모두에서 -13 dB 이내의 입력 반사 손실을 얻었으며 목표 표준에서 요구하는 성능을 모두 만족시키도록 설계되었다.

• Journal of Electrical Engineering and information Science
• /
• 제2권5호
• /
• pp.9-16
• /
• 1997

This paper describes the design of a multistandard video encoder. The proposed encoder accepts conventional NTSC/PAL video signals, It also processes he PAL-plus video signal which is now popular in Europe. The encoder consists of five major building functions which are letter-box converter, color space converter, digital filters, color modulator and timing generator. In order to support multistandard video signals, a programmable systolic architecture is adopted in designing various digital filters. Interpolation digital filters are also used to enhance signal-to-noise ratio of encoded video signals. The input to the encoder can be either YCbCr signal or RGB signal. The outputs re luminance(Y), chrominance(C), and composite video baseband(Y+C) signals. The architecture of the encoder is defined by using Matlab program and is modelled by using Veriflog-HDL language. The overall operation is verified by using various video signals, such as color bar patterns, ramp signals, and so on. The encoder contains 42K gates and is implemented by using 0.6um CMOS process.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제7권1호
• /
• pp.36-42
• /
• 2007

A low-power compact driver for multistandard physical layer is presented. The proposed driver achieves low power and small area through the voltage-mode driver with trans-impedance configuration and the novel hybrid driver,. In the voltage-mode driver, a trans-impedance configuration alleviates the problem of limited common-mode range of error amplifiers and the area and power overhead due to pre-amplifier. For a standard with extended output swing, only current sources are added in parallel with the voltage-mode driver, which is named a 'hybrid driver'. The hybrid architecture not only increases output swing but reduces overall driver area. The overall driver occupies $0.14mm^2$. Power consumptions under 3.3-V supply are 24.5 mW for the voltage-mode driver and 44.5 mW for the hybrid driver.