• Journal of the Korean Institute of Intelligent Systems
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• v.16 no.6
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• pp.659-664
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• 2006

The Context-Aware system is the core technology in the Ubiquitous Computing Environment. Recently, the practical use of a sensor is magnified and the application fields of it are gradually extended in order to collect necessary context information. Context-Aware service integrates the context information which is collected by sensors, and then provides, a suitable service to a user through the process of analysis and reasoning. This service is studied in a variety of fields such as marketing, medical treatment, education and so on. In this paper, we analyze the method of recognizing surrounding context and the result of the awareness by using differential and structural property of multiple valued logic function; propose the model that provides appropriate service depending on the change of surrounding contort; confirm the applicability of the Context-aware system by showing the example of application.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2019.05a
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• pp.398-399
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• 2019

This paper presents a method of the circuit design of the multiple-valued digital logic switching functions based on the modular techniques. Fisr of all, we introduce the necessity, background and concepts of the modular design techniques for the digital logic systems. Next, we discuss the definitions that are used in this paper. For the purpose of the circuit design for the multiple-valued digital logic switching functions, we discuss the extraction of the partition functions. Also we describe the construction method of the building block, that is called the modules, based on each partition functions. And we apply the proposed method to the example, we compare the results with the results of the earlier methods. In result, we decrease the control functions, it means that we obtain the effective cost in the digital logic design for any other earlier methods. In the future research, we require the universal module that traet more partition functions and more compact module.

• Proceedings of the Korean Statistical Society Conference
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• 2002.11a
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• pp.265-272
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• 2002

An Integer-valued autoregressive integrated (INARI) model is introduced to eliminate stochastic trend and seasonality from time series of count data. This INARI extends the previous integer-valued ARMA model. We show that it is stationary and ergodic to establish asymptotic normality for conditional least squares estimator. Optimal estimating equations are used to reflect categorical and serial correlations arising from panel count data and variations arising from three random processes for obtaining observation into estimation. Under regularity conditions for martingale sequence, we show asymptotic normality for estimators from the estimating equations. Using cancer mortality data provided by the U.S. National Center for Health Statistics (NCHS), we apply our results to estimate the probability of cells classified by 4 causes of death and 6 age groups and to forecast death count of each cell. We also investigate impact of three random processes on estimation.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.546-549
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• 1998

다치결정도 (multiple-valued decision diagram : MDD) 와 순서화된 다치결정도 (ordered MDD:OMDD)는 다치논리함수의 표현에 폭넓게 사용된다. p치 n변수인 경우 p/sup (n-1)/으로 증가하는 노드의 수는 ROMDD(reduced OMDD)를 사용하여 현저하게 감소시킬 수 있다. 그러나 다치와 다변수의 경우에는 더욱 많은 공정을 수반하게 된다. 이러한 단점을 보완하기 위해 honghai jiang이 제안한 2치시스템에서의 input implict/output explicit 관계를 갖는 OVAG(output value array graph)를 사용하여 다치논리함수를 표현한다. 그리고 MDD 표현이 어려운 상황에서 MOVAG(multi OVAG)를 사용하여 보다 쉽게 출력값을 배열하는 그래프를 이끌어 낼 수 있다. 본 논문에서는 MOVAG의 구성방법과 회로에서 MOVAG로으 변환에 대한 알고리듬을 제안하였고, 알고리듬에 의한 결과를 MDD와 비교하여 노드수 감소에 따르는 처리속도가 개선됨을 검증하였다.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.745-748
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• 1999

This paper propose the method to derive RM(Reed-Muller) expansion coefficients for Multiple-Valued function. The general method to obtain RM expansion coefficient for p valued n variable is derivation of single variable transform matrix and expand it n times using Kronecker product. The transform matrix used is p$^{n}$ $\times$ p$^{n}$ matrix. In this case the size of matrix increases depending on the augmentation of variables and the operation is complicated. Thus, to solving the problem, we propose derivation of RM expansion coefficients using p$\times$p transform matrix and Karnaugh-map.

• Communications for Statistical Applications and Methods
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• v.27 no.6
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• pp.675-688
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• 2020

In survival analysis of observational data, the inverse probability weighting method and the Cox proportional hazards model are widely used when estimating the causal effects of multiple-valued treatment. In this paper, the two kinds of weights have been examined in the inverse probability weighting method. We explain the reason why the stabilized weight is more appropriate when an inverse probability weighting method using the generalized propensity score is applied. We also emphasize that a marginal hazard ratio and the conditional hazard ratio should be distinguished when defining the hazard ratio as a treatment effect under the Cox proportional hazards model. A simulation study based on real data is conducted to provide concrete numerical evidence.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.8
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• pp.35-45
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• 1999

In this paper, the addition and the multiplicative algorithm of two polynomials over finite field $GF(p^m)$ are presented. The 4-valued arithmetic processor of the serial input-parallel output modular structure on $GF(4^3)$ to be performed the presented algorithm is implemented by current mode CMOS. This 4-valued arithmetic processor using current mode CMOS is implemented one addition/multiplication selection circuit and three operation circuits; mod(4) multiplicative operation circuit, MOD operation circuit made by two mod(4) addition operation circuits, and primitive irreducible polynomial operation circuit to be performing same operation as mod(4) multiplicative operation circuit. These operation circuits are simulated under $2{\mu}m$ CMOS standard technology, $15{\mu}A$ unit current, and 3.3V VDD voltage using PSpice. The simulation results have shown the satisfying current characteristics. The presented 4-valued arithmetic processor using current mode CMOS is simple and regular for wire routing and possesses the property of modularity. Also, it is expansible for the addition and the multiplication of two polynomials on finite field increasing the degree m and suitable for VLSI implementation.

• Korean Medical Education Review
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• v.12 no.2
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• pp.13-18
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• 2010

This study is aimed to reflect non-cognitive traits that should be assessed in admissions interviews for medical school applicants, with the goal being to increase the reliability of the admissions interview. The admissions interview is valued for its ability to assess noncognitive and nonteachable attributes of good doctors, especially which cannot be evaluated with other admission assessment tools. Various characteristics of applicants including age, gender, exam scores, and nonverbal communication were found to have influenced the interview results. Bias from interviewers was a significant factor in the results of the interview. A Structured interview in multiple stations such as the Multiple Mini-Interview showed the highest reliability and validity. To make the interview fair, no information about the applicants was provided to the interviewers and interviewers were recruited from different backgrounds. There have been few research papers on admission interviews in Korea. Active research on the qualities of good doctors and effective and reliable admission interview methods should be encouraged. A strategy should be developed to overcome the philosophical obstacles that medical school professors want to admit academically excellent applicants.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.05a
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• pp.675-676
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• 2013

This paper presents a design method for multiple-output combinational digital logic systems using time domain based on multiplexing and common multi-terminal extension decision diagrams. The common multi-terminal extension decision diagrams represents extension valued multiple-output functions, while time domain based on multiplexing systems transmit several signals on a single lines. The proposed method can reduce the 1)hardware, 2)logic levels and 3)pins. In the logic system design, we use two types of decision diagrams, that is the common binary decision diagrams and common multi-terminal extension decision diagrams.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.6
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• pp.1288-1293
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• 2005

This paper presents a design method for multiple-output combinational digital logic systems using time domain based on multiplexing(TDBM) and common multi-terminal extension decision diagrams(CMTEDD). The CMIEDDs represents extension valued multiple-output functions, while TDBM systems transmit several signals on a single lines. The proposed method can reduce the 1)hardware, 2)logic levels and 3)pins. In the logic system design, we use two types of decision diagrams(DDs), that is the common binary decision diagrams(CBDDs) and CMTEDDs. Also, we propose an algorithms to derive common multiple-terminal binary decision diagrams(CMTBDD) from CBDDs, and CMTEDDs from CMTBDDs. The CMTEDDs over CBDDs is more compactness in terms of number of non-terminal nodes, where the nodes for output selection variables are not included in the non-terminal nodes. In the logic design, each non-terminal nodes of an CBDDs and an CMTEDDs is realized by a multiplexer(MUX). In addition, we compare the proposed TDBM realization with the conventional one.