• Title/Summary/Keyword: multilayer structure

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Hardness and Oxidation Resistance of Ti0.33Al0.67N/CrN Nano-multilayered Superlattice Coatings

  • Ahn, Seung-Su;Oh, Kyung-Sik;Chung, Tai-Joo;Park, Jong-Keuk
    • Journal of the Korean Ceramic Society
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    • v.56 no.1
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    • pp.49-55
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    • 2019
  • $Ti_{0.33}Al_{0.67}N/CrN$ nano-multilayers, which are known to have excellent wear resistance, were prepared using an unbalanced magnetron sputter to have various periods of 2-5 nm. $Ti_{0.33}Al_{0.67}N$ had a hexagonal structure in a single layer, but converted to a cubic structure by forming a multilayer with CrN, which has a cubic structure. Thus, $Ti_{0.33}Al_{0.67}N$ formed a superlattice in the multilayer. The $Ti_{0.33}Al_{0.67}/CrN$ multilayer with a period of 2.5 nm greatly exceeded the hardness of the $Ti_{0.33}Al_{0.67}N$ and the CrN single layer, reaching 39 GPa. According to the low angle X-ray diffraction results, the $Ti_{0.33}Al_{0.67}N/CrN$ multilayer maintained its as-coated structure to a temperature as high as $700^{\circ}C$ and exhibited hardness of 30 GPa. The thickness of the oxide layer of the $Ti_{0.33}Al_{0.67}N/CrN$ multilayered coating was less than one-tenth of those of the single layers. Thus, $Ti_{0.33}Al_{0.67}N/CrN$ multilayered coating had hardness and oxidation resistance far superior to those of its constituent single layers.

The Effects of Phosphorus Doped ZnO Thin Films with Multilayer Structure Prepared by Pulsed Laser Deposition Method (PLD법으로 제작된 Phosphorus를 도핑한 ZnO 박막의 다층 구조 도입에 따른 영향)

  • Lim, Sung-Hoon;Kang, Hong-Seong;Kim, Gun-Hee;Chang, Hyun-Woo;Kim, Jea-Won;Lee, Sang-Yeol
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.05a
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    • pp.127-130
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    • 2005
  • The properties of phosphorus doped ZnO multilayer thin films deposited on (001) sapphire substrates by pulsed laser deposition (PLD) were investigated by using annealing treatment at various annealing temperature after deposition. The phosphorus doped ZnO multilayer was composed of phosphorus doped ZnO layer and two pure ZnO layers on sapphire substrate. The structural. electrical and optical properties of the ZnOthin films were measured by X-ray diffraction (XRD). Hall measurements and photoluminescence (PL). As the annealing temperature optimized. the electrical properties of the ZnO multilayer showed a electron concentration of $1.56{\times}10^{16}/cm^3$, a resistivity of 17.97 ${\Omega}cm$. It was observed the electrical property of the film was changed by dopant activation effect as thermal annealing process

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Design and fabrication of Diplexer for Dual-band GSM/DCS Application using High-Q Multilayer Inductors (고품질 적층형 인덕터를 이용한 이중 대역 GSM/DCS 대역 분리용 다이플렉서의 설계 및 제작)

  • Sim, Sung-Hun;Kang, Chong-Yun;Choi, Ji-Won;Yoon, Young-Joong;Yoon, Seok-Jin;Kim, Hyun-Jai
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2003.11a
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    • pp.294-298
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    • 2003
  • In this paper, the modeling and design of high-Q multilayer passives have been investigated, and multilayer diplexer for GSM/DCS applications has been designed and fabricated using the passives. To minimize the system, the configuration of a multilayer inductor has involved a square spiral structure. Modeling of a multilayer inductor was performed by the subsystems of distributed components, and using the modeling the optimal structures of the high-Q multilayer inductor could be designed by analyzing parasitics and couplings which affect their frequency characteristics. Multilayer diplexer for GSM/DCS application has been designed and fabricated using LTCC technology. LPF for GSM band had the passband insertion loss of less than 0.55 dB, the return loss of more than 12 dB, and the isolation level of more than 26 dB by locating attenuation pole at 1800 MHz. HPF for DCS band had the passband insertion loss of less than 0.82 dB, the return loss of more than 11 dB, and the isolation level of more than 38 dB by locating attenuation pole at 930 MHz.

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A Study on the Characteristics of NiInZnO/Ag/NiInZnO Multilayer Thin Films Deposited by RF/DC Magnetron Sputter According to the Thickness of Ag Insertion Layer (RF/DC 마그네트론 스퍼터로 제조한 NiInZnO/Ag/NiInZnO 다층박막의 Ag 금속 삽입층 두께 변화에 따른 특성 연구)

  • Kim, Nam-Ho;Kim, Eun-Mi;Heo, Gi-Seok;Yeo, In-Seon
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.65 no.12
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    • pp.2014-2018
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    • 2016
  • Transparent, conductive electrode films, showing the particular characteristics of good conductivity and high transparency, are of considerable research interest because of their potential for use in opto-electronic applications, such as smart window, photovoltaic cells and flat panel displays. Multilayer transparent electrodes, having a much lower electrical resistance than widely-used transparent conducting oxide electrodes, were prepared by using RF/DC magnetron sputtering system. The multilayer structure consisted of three layers, [NiInZnO(NIZO)/Ag/NIZO]. The optical and electrical properties of the multilayered NIZO/Ag/NIZO structure were investigated in relation to the thickness of each layer. The optical and electrical characteristics of multilayer structures have been investigated as a function of the Ag and NIZO film thickness. High-quality transparent conductive films have been obtained, with sheet resistance of $9.8{\Omega}/sq$ for Ag film thickness of 8 nm. Also the multilayer films of inserted Ag 8 nm thickness showed a high optical transmittance above 93% in the visible range. The electrical and optical properties of the new multilayer films were mainly dependent on the thickness of Ag insertion layer.

A Numerical Study of NAND Flash Memory on the cooling effect (낸드플래시 메모리의 냉각효과에 관한 수치적 연구)

  • Kim, Ki-Jun;Koo, Kyo-Woog;Lim, Hyo-Jae;Lee, Hyouk
    • 한국전산유체공학회:학술대회논문집
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    • 2011.05a
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    • pp.117-123
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    • 2011
  • The low electric power and high efficiency chips are required because of the appearance of smart phones. Also, high-capacity memory chips are needed. e-MMC(embedded Multi-Media Card) for this is defined by JEDEC(Joint Electron Device Engineering Council). The e-MMC memory for research and development is a memory mulit-chip module of 64GB using 16-multilayers of 4GB NAND-flash memory. And it has simplified the chip by using SIP technique. But mulit-chip module generates high heat by higher integration. According to the result of study, whenever semiconductor chip is about 10 $^{\circ}C$ higher than the design temperature it makes the life of the chip shorten more than 50%. Therefore, it is required that we solve the problem of heating value and make the efficiency of e-MMC improved. In this study, geometry of 16-multilayered structure is compared the temperature distribution of four different geometries along the numerical analysis. As a result, it is con finned that a multilayer structure of stair type is more efficient than a multilayer structure of vertical type because a multi-layer structure of stair type is about 9 $^{\circ}C$ lower than a multilayer structure of vertical type.

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Design of RCS Reduction Structure of Integrated Mast on the Destroyer (구축함에 탑재되는 통합마스트의 RCS 저감 구조 설계)

  • Lee, Jong-Hak;Ra, Young-Eun;Lee, Keon-Min;Jang, Ju-Su
    • Journal of IKEEE
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    • v.24 no.1
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    • pp.238-242
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    • 2020
  • This paper presents a technique using a multilayered dielectric coating to reduce the radar cross section (RCS) value of an integrated mast mounted in a destroyer. The proposed multilayer structure has the advantage of being easy to fabricate because the dielectric constant is defined so that a general dielectric that does not contain a magnetic component that requires high dielectric constant or is frequently used for blocking electromagnetic wave absorption can be used. After applying the proposed multi-layer dielectric structure to the integrated mast shape, the simulation results show that the RCS reduction performance is 10.9dB at 6GHz, 11.95dB at 12GHz, and 11.63dB at 18GHz compared to the structure without the multilayer structure.

Preparation of AZO/Ag/AZO multilayer for transparent electrode by using facing targets sputtering method (대향 타겟 스퍼터링 법을 이용한 투명전극용 AZO/Ag/AZO 다층 박막의 제작)

  • Cho, Bum-Jin;Kim, Kyung-Hwan
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.11a
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    • pp.290-291
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    • 2006
  • We prepared the multilayer with Al doped ZnO (AZO)/Ag/AZO structure. The multilayer were deposited with various thickness of Ag layer on glass substrates at room temperature by using facing targets sputtering (FTS) method. To investigate the electrical, optical and structural properties, we used Hall Effect measurement system, four-point probes. UV-VIS spectrometer with a wavelength of 300 - 100nm, X-ray Diffractometer(XRD) and scanning electron microscopy (SEM). We obtained multilayer thin film with the low resistivity $5,9{\times}10^{-5}{\Omega}cm$ and the average transmittance of 86% m the visible range (400 - 800nm).

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Double Amplification Mechanism Using Multilayer Piezoelectric Actuator (적층형 압전소자를 이용한 이중증폭 메커니즘)

  • Kim, Jun-Hyung;Kim, Soo-Hyun;Kwak, Yoon-Keun
    • Proceedings of the KSME Conference
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    • 2001.06b
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    • pp.754-758
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    • 2001
  • A new kind of piezoelectric actuation structure named double amplified multilayer actuator is proposed. Double amplified multilayer actuator combines both dimentional and flextensional amplification concepts. As a result the displacement of the actuator can be more than one hundred times larger than the displacement of multilayer actuator and can be used in in-pipe locomation robot such as an endoscope actuator. This paper studied the dependence of displacement on actuator parameters theoretically and experimentally.

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Fabrication and electrical properties of Rosen-type multilayer piezoelectric transformer (Rosen type 적층형 압전변압기의 제작 및 전기적 특성)

  • Lee, Chang-Bae;Yoon, Jung-Rag;Lee, Kyung-Min;Woo, Byung-Chul
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.11a
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    • pp.250-250
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    • 2007
  • In this paper, multilayer piezoelectric transformer for high power is presented. This piezoelectric transformer, with a multilayered construction in the thickness direction, was fabricated at the sintering temperature of $1055^{\circ}C$. The electrical properties of multilayer piezoelectric transformer as a function of Internal electrode structure, with same size, were investigated. Also, the multilayer piezoelectric transformer with different layer number of 5, 10, 15 layers, were investigated.

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Fabrication of YB$_{a2}Cu_3O_{7-{\delta}}/SrTiO_3/YB_{a2}Cu_3O_{7-{\delta}}$ multilayer structure for ground plane of single flux quantum digital circuit (단자속 양자 디지털 회로의 접지면을 위한 YB$_{a2}Cu_3O_{7-{\delta}}/SrTiO_3/YB_{a2}Cu_3O_{\7-{\delta}}$ 다층 구조의 제작)

  • Jang, Ju-Eok;Kim, Young-Hwan;Kim, Young-Hwan;Lee, Jong-Min;Park, Jong-Hyeog;Kang, Joon-Hee
    • 한국초전도학회:학술대회논문집
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    • v.9
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    • pp.71-74
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    • 1999
  • We have fabricated high-T$_c$ superconducting YBa$_2Cu_3O_{7-{\delta}}\;/SrTiO_3/\;YBa_2Cu_3O_{7-{\delta}}$ (YBCO/STO/YBCO) multilayer structure on (001) $SrTiO_3$ substrate by using pulsed laser deposition technique for applying to ground plane of single flux quantum digital circuits. In this structure, the top and bottom YBCO layers were connected through the holes in the STO insulating layer. The critical temperature of the two YBCO layers connected each other was 86 K after annealing at 500 $^{\circ}C$ in $O_2$ atm for about 60 hr. This result shows that the annealing process is very important fabricating YBCO/STO/YBCO multilayer structure An experiment to optimize the fabrication process of YSCO/ST0/YBCO multilayer structure with good quality is in progress.

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