• Proceedings of the KIPE Conference
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• 2005.07a
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• pp.659-662
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• 2005

In this paper, we proposed the novel hybrid multi-level inverter using combination of the output voltage of transformers to reduce the THD(Total Harmonic Distortion) and improve the waveform of output voltage. The proposed multi-level inverter used the output of transformer which is 1times, 2times, 4times of input of the transformers. So we increased the output voltage from the reduce the number of switching component and transformer. Also, we tested the proposed prototype 15-level inverter to clarify the proposed electric circuit and reasonableness of control signal for the proposed multi -level PWM inverter.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.54 no.4
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• pp.195-200
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• 2005

In this paper, we proposed the electric circuit using one common arm of H-Bridge Inverters to reduce the number of switching component in multi-level inverter combined with H-Bridge Inverters and Transformers. and furthermore we suggested the new multi-level PWM inverter using PWM level to reduce THD(Total Harmonic Distortion). and we used the switching method that can be same rate of usage at each transformer. Also, we tested the proposed prototype 9-level inverter to clarify the proposed electric circuit and reasonableness of control signal for the proposed multi-level PWM inverter.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.52 no.7
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• pp.352-360
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• 2003

This paper deals with a simple method in order to analyze and compare the harmonic characteristics in the multi-level inverter. Generally, the magnitude of harmonic components becomes different according to the multi-carrier Pulse Width Modulation(PWM) techniques, the modulation index($M_i$) and the switching frequency The previous papers analyzed the harmonic characteristics from the viewpoint of the space voltage vector. Hence, the calculation of the harmonic vector becomes more difficult and complex in 4-level or over 5-level. However, the proposed method has reduced an amount of calculation and simplified the process of it, using the relationship between the reference voltage and the output phase voltage to the load neutral point. It is applied to the 5-level cascade inverter and the harmonic characteristics for each multi-carrier PWM technique are compared through the simulation.

• Proceedings of the KIPE Conference
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• 2005.07a
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• pp.655-658
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• 2005

In this paper, we proposed the electric circuit using one common arm of H-Bridge Inverters to reduce the number of switching component in multi-level inverter combined with H-Bridge Inverters and Transformers. and furthermore we suggested the new multi-level PWU inverter using PWM level to reduce THD(Total Harmonic Distortion). and we used the switching method that can be same rate of usage at each transformer. Also, we tested the proposed prototype 9-level inverter to clarify the proposed electric circuit and reasonableness of control signal for the proposed multi-level PWM inverter.

• Proceedings of the KIEE Conference
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• 1998.07f
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• pp.1963-1965
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• 1998

In this paper, a new simplified configuration for a multi-level PWM inverter is proposed. The proposed inverter consists of an auxiliary circuit with one switching device, and 3 phase full-bridge inverter. The proposed inverter, in spite of reduction of the switching devices, offers characteristics similar to the NPC(Neutral - point - clamped)- PWM inverter. Also, since the reduction of the switching devices, the control strategy is simplified. And switching loss is reduced. In addition to, it is possible that reliable DC level voltage than former multi-level inverter. And load power application is same to conventional NPC-PWM inverter. The performance of the system is verified by simulation. In this paper, show the simulation result of the single phase full bridge inverter application.

• Journal of international Conference on Electrical Machines and Systems
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• v.1 no.3
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• pp.366-371
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• 2012

In this paper, we propose an electric circuit using one common-arm of H-Bridge inverters to reduce the number of switching components in the multi-level inverter combined with H-Bridge inverters and transformers. And furthermore, we suggested a new multi-level PWM inverter using PWM level to reduce THD (Total Harmonic Distortion). We use a phase-shift switching method that has the same rate of usage at each transformer. Also, we test the proposed prototype 9-level inverter to clarify the proposed electric circuit and reasonableness of the control signal for the proposed multi-level PWM inverter.

• Proceedings of the KIEE Conference
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• 2005.07b
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• pp.1477-1479
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• 2005

In this paper, we proposed the electric circuit using one common arm of H-Bridge inverters to reduce the number of switching component in multi-level inverter combined with H-Bridge Inverters and Transformers. and furthermore we suggested the new multi-level PWM inverter using PWM level to reduce THD(Total Harmonic Distortion) and we used the switching method that can be same rate of usage at each transformer. Also, we tested the proposed prototype 15-level inverter to clarify the proposed electric circuit and reasonableness of control signal for the proposed multi-level PWM inverter.

• The Transactions of the Korean Institute of Power Electronics
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• v.15 no.4
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• pp.288-295
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• 2010

Multi-level inverters have drawn much of attention in recent years because it can meet the demand of high power applications and good power quality associated with reduced harmonic distortion. As the number of voltage level increases, field programmable gate arrays (FPGAs) are suitable for the implementation of multi-level modulation algorithm. This paper proposes the implementation method for generating PWM pulses at the three phase diode clamped five-level inverter using FPGA. The strategy for communicating stably the data of three-phase reference voltages between the DSP and FPGA is suggested. The techniques for generating PWM signals based on a multi-carrier modulation method are carried out through the experiments with 32-bit DSP and Cyclone-III FPGA.

• Proceedings of the KIPE Conference
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• 2005.07a
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• pp.673-676
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• 2005

In this paper, we proposed the electric circuit using one common arm of H-Bridge Inverters to reduce the number of switching component in multi-level inverter combined with H-Bridge Inverters and Transformers. and furthermore we suggested the new multi-level PWM inverter using PWM level to reduce THD(Total Harmonic Distortion). and we used the switching method that can be same rate of usage at each transformer. Also, we tested the proposed prototype 9-level inverter to clarify the proposed electric circuit and reasonableness of control signal for the proposed multi-level PWM inverter.

• Proceedings of the KIPE Conference
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• 2002.11a
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• pp.171-174
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• 2002

This paper deals with a novel method in order to analyze the harmonic characteristics in the multi-level inverter. Generally, the magnitude of harmonic components is different according to the carrier PWM techniques, modulation Index(Mi), and the level of multi-level inverter The previous papers analyzed the harmonic characteristics from the viewpoint of the space vector. Hence, the calculation of the harmonic vector becomes difficult and complex in 4-level or more than S-level. However, the proposed method of this paper reduced an amount of calculation and simplified the process of calculation by using the relationship between reference voltage and output phase voltage to load neutral. This paper analyzed the harmonic and it is applied to the multi-carrier PWM techniques in 5- level and other-level of cascaded inverter system.