• 제목/요약/키워드: multi-layer dielectric

검색결과 131건 처리시간 0.025초

비휘발성 메모리 적용을 위한 $SiO_2/ZrO_2$ 다층 유전막의 전기적 특성 (Electrical characteristic of stacked $SiO_2/ZrO_2$ for nonvolatile memory application as gate dielectric)

  • 박군호;김관수;오준석;정종완;조원주
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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    • pp.134-135
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    • 2008
  • Ultra-thin $SiO_2/ZrO_2$ dielectrics were deposited by atomic layer chemical vapor deposition (ALCVD) method for non-volatile memory application. Metal-oxide-semiconductor (MOS) capacitors were fabricated by stacking ultra-thin $SiO_2$ and $ZrO_2$ dielectrics. It is found that the tunneling current through the stacked dielectric at the high voltage is lager than that through the conventional silicon oxide barrier. On the other hand, the tunneling leakage current at low voltages is suppressed. Therefore, the use of ultra-thin $SiO_2/ZrO_2$ dielectrics as a tunneling barrier is promising for the future high integrated non-volatile memory.

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Highly Miniaturized and Performed UWB Bandpass Filter Embedded into PCB with SrTiO3 Composite Layer

  • Cheon, Seong-Jong;Park, Jun-Hwan;Park, Jae-Yeong
    • Journal of Electrical Engineering and Technology
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    • 제7권4호
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    • pp.582-588
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    • 2012
  • In this paper, a highly miniaturized and performed UWB bandpass filter has been newly designed and implemented by embedding all the passive elements into a multi-layered PCB substrate with high dielectric $SrTiO_3$ composite film for 3.1 - 4.75 GHz compact UWB system applications. The high dielectric composite film was utilized to increase the capacitance densities and quality factors of capacitors embedded into the PCB. In order to reduce the size of the filter and avoid parasitic EM coupling between the embedded filter circuit elements, it was designed by using a $3^{rd}$ order Chebyshev circuit topology and a capacitive coupled transformation technology. Independent transmission zeros were also applied for improving the attenuation of the filter at the desired stopbands. The measured insertion and return losses in the passband were better than 1.68 and 12 dB, with a minimum value of 0.78 dB. The transmission zeros of the measured response were occurred at 2.2 and 5.15 GHz resulting in excellent suppressions of 31 and 20 dB at WLAN bands of 2.4 and 5.15 GHz, respectively. The size of the fabricated bandpass filter was $2.9{\times}2.8{\times}0.55(H)mm^3$.

LTCC를 이용한 push-push 유전체 공진 발진기의 설계 및 제작 (Design and Fabrication of the Push-push Dielectric Resonator Oscillator using a LTCC)

  • 류근관;오일덕;김성찬
    • 한국정보통신학회논문지
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    • 제14권3호
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    • pp.541-546
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    • 2010
  • LTCC(low temperature co-fired ceramic) 공정의 다층기판을 이용하여 push-push 유전체 공진 발전기를 설계 및 제작하였다. 중심주파수 8GHz를 갖는 직렬 궤환형의 단일 유전체 공진 발진기를 설계하고 이를 이용하여 중심주파수 16GHz인 push-push 유전체 공진 발진기를 설계하였다. 발전기의 회로 크기에 큰 영향을 미치는 바이어스 회로를 LTCC 다층구조의 중간층에 배치함으로써 일반적인 단층기판을 이용한 경우에 비해 발진기 회로의 크기를 크게 줄 일 수 있었다. 제작된 push-push 유전체 공진 발진기의 측정결과 기본 주파수 및 3차 고조파 억압특성은 각각 15dBc 및 25dBc 이상의 특성을 나타내었으며 발진기의 위상잡음 특성은 -102dBc/Hz@100KHz 및 -128dBc/Hz@1MHz의 특성을 각각 나타내었다.

PLZT박막의 제조 및 유전 특성에 관한 연구 (A Study on the Preparation and Dielectric Properties of the PLZT Thin Films.)

  • 박준열;박인길;이성갑;이영희
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1995년도 춘계학술대회 논문집
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    • pp.187-191
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    • 1995
  • Thin film of the (Pb$\_$1-x/La.sub x/)(Zr$\_$0.25/Ti/Sub 0.48/) O$_3$(x=0~13[at%]) were prepared by Sol - Gel method. Multi-layer PLZT thin films were fabricated by spin-coating on Pt/Ti/SiO$_2$/Si substrate. The crystallinity and microstructure of the films were investigated with the sintering condition. At the sintering temperature of of 600[$^{\circ}C$], the perovskite phase was dominat. PLZT(11/52/48)thin films sintered at 600[$^{\circ}C$], 1[hr] had good dielectric constant (1236), dielectric loss (2.2[%]), remanent polarization (1.38[${\mu}$C/$\textrm{cm}^2$] and coercive field(16.86[ kV/cm]) respectively.

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The Thickness Dependence of Edge Effect in Thin Insulating Films

  • Song Jeong-Myen;Moon Byung-Moo;Sung Yung-Kwon
    • Transactions on Electrical and Electronic Materials
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    • 제4권4호
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    • pp.13-17
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    • 2003
  • This paper deals with the edge effect in thin insulating films, focusing on their dependence on film thickness. The finding is that the electric field is lowered at the edge as the film thickness is reduced, which, in turn, is closely related to dielectric breakdown voltage. In order to analyze this phenomenon, a simple capacitor model is introduced with which dependence of dielectric breakdown voltage around the electrode edge on the film thickness is explained. Due to analytical difficulty to get the expression of electrical field strength at the edge, an equivalent circuit approach is used to find the voltage expression first and then the electric field expression using it. The relation gets to an agreement with the experimental findings shown in the paper. This outcome may be extended to solve similar problems in multi-layer insulating films.

다층유전체를 이용한 광대역 전파흡수체 최적 설계 (Optimum design of broadband RAM(Radar Absorbing Material)'s using multi-layer dielectrics)

  • 남기진;이상설
    • 전자공학회논문지A
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    • 제32A권1호
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    • pp.70-78
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    • 1995
  • In order to implement broadband RAM's(Radar Absorbing Materials) made up of multiple dielectricl layers, the design variables such as the dielectrci constaints, the depths and the loss tangents of dielectric are optimized. The wave impedances regarding the reflective wave are found in dielectrics, input impedances and reflection coefficients with multiple dielectric layers are derived from the transmission line circuit theory. Finally, minimum average reflective power and optimum design variables are obtained by applying the numerical technique, called modified Powell method. In case of four dielectric layers with inequality constraints in design variables, a quite favourable and feasible result with the total depth of 1.1 cm, the average reflective power of 0.85% over the bradband frequency range is obtained for a specific example.

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Dy 및 Mg가 첨가된 BaTiO3에서 소결 온도가 미세구조와 유전특성에 미치는 영향 (Effect of sintering temperature on microstructure and dielectric properties in (Dy, Mg)-doped BaTiO3)

  • 우종원;김성현;최문희;전상채
    • 한국결정성장학회지
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    • 제32권5호
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    • pp.175-182
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    • 2022
  • MLCC(Multi-Layer Ceramic Capacitor)의 유전체 층에 사용되는 BaTiO3는 유전 특성의 온도안정성을 향상시키기 위해 첨가제로서 희토류 및 Mg를 사용한다. 이러한 첨가제는 소결 중 입자성장 및 치밀화 거동, 결국 유전 특성에 지대한 영향을 주게 되므로 조성에 따른 미세구조 발현 양상을 살펴보는 것이 중요하다. 본 연구는 95BaTiO3-1Dy2O3-2MgO-2SiO2(mol%)의 조성에서 온도 변화에 따른 결정구조, 입자성장 및 밀도 변화를 관찰하고 이러한 변화가 유전 상수에 미치는 영향을 관찰하였다. 1200~1300℃의 온도범위에서 소결 온도가 증가함에 따라, 평균 입도는 눈에 띄게 커지는 반면 밀도의 변화는 미미하여 입자크기가 주요한 미세구조적 요소임을 밝혔다. 본 실험에서 관찰된 입자크기의 온도의존성은 기존 입자성장 이론에서 설명한 온도 변화에 따른 입자성장 거동의 변화양상과 잘 부합하였으며, 이러한 이해는 향후 희토류가 첨가된 BaTiO3에서 유전 특성 향상을 위한 소결 미세구조 제어에 유용하게 활용될 수 있을 것이다.

나노인덴테이션을 이용한 MLCC용 BaTiO3 세라믹스의 기계적 물성평가 (Feasibility Test for Mechanical Property Characterization of BaTiO3 Ceramics for MLCC Application Using Nanoindentation)

  • 류성수;김성원;김형준;김형태
    • 한국분말재료학회지
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    • 제16권1호
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    • pp.37-42
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    • 2009
  • In this study, the feasible test for the mechanical property characterization of $BaTiO_3$ ceramics and multi-layer ceramic capacitor(MLCC) was performed with nanoindentation technique. In case of $BaTiO_3$ ceramics, hardness and elastic modulus are dependent on the densification of specimen showing the highest hardness and elastic modulus values of 12.3 GPa and 155 GPa, respectively at $1260^{\circ}C$. In case of MLCC chip, hardness of dielectric layer was lower than that of margin region. The nanoindentation method could be useful tool for the measurement of mechanical property within $BaTiO_3$ dielectric layer of very thin thickness in high capacitance MLCC.

L/L 진공시스템을 이용한 적층캐패시터의 하층산화막 박막화에 대한 연구 (A study on the bottom oxide scaling for dielectric in stacked capacitor using L/L vacuum system)

  • 정양희;김명규
    • E2M - 전기 전자와 첨단 소재
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    • 제9권5호
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    • pp.476-482
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    • 1996
  • The multi-dielectric layer SiO$_{2}$/Si$_{3}$N$_{4}$/SiO$_{2}$(ONO) is used to improve electrical capacitance and to scale down the memory device. In this paper, improvement of the capacitance by reducing the bottom oxide thickness in the nitride deposition with load lock(L/L) vacuum system is studied. Bottom oxide thickness under the nitride layer is measured by ellipsometer both in L/L and non-L/L systems. Both results are in the range of 3-10.angs. and 10-15.angs., respectively, independent of the nitride and top oxide thickness. Effective thickness and cell capacitance for SONOS capacitor are in the range of 50-52.angs. and 35-37fF respectively in the case of nitride 70.angs. in L/L vacuum system. Compared with non-L/L system, the bottom oxide thickness in the case of L/L system decreases while cell capacitance increases about 4 fF. The results obtained in this study are also applicable to ONO scaling in the thin bottom oxide region of memory stacked capacitor.

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다층 평면형 초고주파 필터의 설계 (A Design of Multi-layer Planar Type Microwave Filter)

  • 이홍섭;황희용
    • 정보통신설비학회논문지
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    • 제4권1호
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    • pp.31-36
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    • 2005
  • In this paper, a planar type bandpass filter in multilayered PCB is presented. The multilayered PCB structure has some advantages on fabricating microwave devices such as the size reduction and ability of tight coupling by folding or embedding. The proposed BPF has two transmission zeros at the both sides of the center frequency by using independent electric and magnetic coupling structure. The designed BPF with four layer teflon PCBs of dielectric constant 2.94 has dimensions of 24x20x1.524 in mm, center frequency of 2.47GHz and bandwidth of about l00MHz. A good agrement is achieved between the measured result and the simulated one. The influences of air gaps between the layers are also analyzed and presented.

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