• 한국광학회:학술대회논문집
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• 한국광학회 2003년도 제14회 정기총회 및 03년 동계학술발표회
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• pp.300-301
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• 2003

As the demand for high frequency(bandwidth) optical module is increased, there is a need for fabricating silicon optical bench(SiOB) with low parasitic impedance. In this paper, we discuss multi-layer structure method for manufacturing SiOB with low capacitance. This structure method decreases the capacitance between the conductive patterns for about 94∼97％ compared to the conventional structure without raising the resistivity of silicon, or increasing the thickness of the dielectric film.

• 한국전기전자재료학회논문지
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• 제15권6호
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• pp.492-498
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• 2002

In this paper, we present the simulation results of multi-layer VCO(voltage controlled oscillator), which is composed of resonator, oscillator, and buffer circuit, using EM simulator and nonlinear RF circuit simulator. EM simulator is used for obtaining the EM(Electromagnetic) characteristics of conductor pattern as well as designing the multi-layer VCO. Obtained EM characteristics were used as real components in nonlinear RF circuit simulation. Finally the overall VCO was simulated by the nonlinear RF circuit simulator. The material for the circuit pattern was Ag and the dielectric was Dupont 951AT, which will be applied for LTCC process. The structure of multi-layer VCO is constructed with 4 conducting layer. Simulated results showed that the output level was about 4.5 [dBm], the phase noise was -104 [dBc/Hz] at 30 [kHz] offset frequency, the harmonics -8 dBc, and the control voltage sensitivity of 30 [MHz/V] with a DC current consumption of 9.5 [mA]. The size of VCO is $6{\times}9{\times}2 mm$(0.11 [cc]).

• 한국전자파학회지:전자파기술
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• 제2권3호
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• pp.26-31
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• 1991

The scattering property of TMz illuminated a elliptic dielectric cylinders with arbitrary cross section are analyzed by the boundary element techniques. The boundary element equations are for- mulated via Maxwell's equations, weighted residual of Green's theorem, and the boundary conditions. The unknown surface fields on the boundaries are then calculated by the boundary element integral equations. Once the surface fields are found, the scattered fields in far-zone and scattering widths (SW) are readily determined. To show the validity and usefulness of this formulation, computations are compared with those obtained using analytical method and one layer circular cylinder. As exten- sion to arbitrary cross-sectioned cylinders, plane wave scattering from a elliptic dielectric cylinders are numerically analyzed. A general computer program has been developed using the quadratic ele- ments(Higher order borndary elements) and the Gaussian quadrature.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제38회 동계학술대회 초록집
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• pp.257-257
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• 2010

One of the critical issues for applications of flexible organic thin film transistors (OTFTs) for flexible electronic systems is the electrical stabilities of the OTFT devices, including variation of the current on/off ratio ($I_{on}/I_{off}$), leakage current, threshold voltage, and hysteresis, under repetitive mechanical deformation. In particular, repetitive mechanical deformation accelerates the degradation of device performance at the ambient environment. In this work, electrical stabilities of the pentacene organic thin film transistors (OTFTs) employing multi-stack hybrid encapsulation layers were investigated under mechanical cyclic bending. Flexible bottom-gated pentacene-based OTFTs fabricated on flexible polyimide substrate with poly-4-vinyl phenol (PVP) dielectric as a gate dielectric were encapsulated by the plasma-deposited organic layer and atomic layer deposited inorganic layer. For cyclic bending experiment of flexible OTFTs, the devices were cyclically bent up to $10^5$ times with 5mm bending radius. In the most of the devices after $10^5$ times of bending cycles, the off-current of the OTFT with no encapsulation layers was quickly increased due to increases in the conductivity of the pentacene caused by doping effects from $O_2$ and $H_2O$ in the atmosphere, which leads to decrease in the $I_{on}/I_{off}$ and increase in the hysteresis. With encapsulation layers, however, the electrical stabilities of the OTFTs were improved significantly. In particular, the OTFTs with multi-stack hybrid encapsulation layer showed the best electrical stabilities up to the bending cycles of $10^5$ times compared to the devices with single organic encapsulation layer. Changes in electrical properties of cyclically bent OTFTs with encapsulation layers will be discussed in detail.

• 한국전자통신학회논문지
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• 제16권3호
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• pp.395-400
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• 2021

본 논문에서는 IEEE 802.11a에서 정의된 5GHz 대역의 무선랜 주파수 대역을 만족하는 광대역 패치 안테나를 설계 및 제작하였다. IEEE 802.11a에서는 200개의 채널을 정의하고 있으며 이는 675MHz로 12.3% 이상의 대역폭을 요구한다. 본 논문에서는 상용화된 테프론 기판으로 공기 유전체를 포함하는 다층기판을 구현하여 낮은 유전율을 구현하고 결합선로를 통한 급전 방식을 통해 광대역 특성을 얻었다. 최적화된 광대역 무선랜 안테나는 5.43GHz의 중심주파수에서 38.99dB의 반사손실과 12.9%의 VSWR 2:1 대역폭으로 설계되었다. 제작된 안테나의 이득은 IEEE 802.11a의 채널 40, 56, 153에서 각각 4.38, 4.52, 5.12dBi를 나타내며 설계 결과와 유사한 결과를 보였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집 Vol.3 No.2
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• pp.653-656
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• 2002

In this paper, we present the simulation results of multi-layer VCO(voltage controlled oscillator), which is composed of resonator, oscillator, and buffer circuit, using EM simulator and nonlinear RF circuit simulator. EM simulator is used for obtaining the EM(Electromagnetic) characteristics of conductor pattern as well as designing the multi-layer VCO. Obtained EM characteristics were used as real components in nonlinear RF circuit simulation. Finally the overall VCO was simulated by the nonlinear RF circuit simulator. The material for the circuit pattern was Ag and the dielectric was DuPont 951AT, which will be applied for LTCC process. The structure of multi-layer VCO is constructed with 4 conducting layer. Simulated results showed that the output level was about 4.5 [dBm], the phase noise was -104 [dBc/Hz] at 30 [kHz] offset frequency, the harmonics -8 dBc, and the control voltage sensitivity of 30 [MHz/V] with a DC current consumption of 9.5 [mA]. The size of VCO is $6{\times}9{\times}2$ mm(0.11[cc]).

• 한국전기전자재료학회논문지
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• 제21권6호
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• pp.509-516
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• 2008

Multi-layer circuit card for semiconductor inspection was fabricated by LTCC technology. After a proper impedance design without electrical interference, ceramic tapes with the composition of $CaO-Al_2O_3-SiO_2-B_2O_3$ glass and $Al_2O_3$ were prepared. The electrode with silver paste printed on the tape. Printed ceramic sheets were then laminated and sintered. Densities and dielectric properties were measured. The microstructure, fracture surface of the region of via and matching state of substrate-electrode were observed. The durability of plated outside electrode were examined by hardness and scratch test.

• 한국세라믹학회지
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• 제46권2호
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• pp.161-169
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• 2009

MLCC (Multi-layer Ceramic Capacitor) is the most important passive component in electronic devices such as HHP, PC and digital display. The development trend of MLCC is a miniaturization with increasing the capacitance. In this paper, a development history of the high capacitance MLCC in Korea was introduced, and the necessity of the finer $BaTiO_3$ was explained in the viewpoint of the issued electrical and dielectric properties of high capacitance MLCC. The bottleneck technologies to realize the high capacitance was shortly introduced, followed by the prediction of the development trend of MLCC in near future.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 하계종합학술대회논문집
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• pp.871-874
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• 1998

A new transmission line parameter extraction method of iC interconnects on silicon substrate is presented. To extract the acurate parameters, the silicon substrate effects were taken into account. Since the electromagnetic fields under the silicon substrate are propagated with slow wave mode, effective dielectric constant and different ground plane with the multi-layer dielectric structures were employed for inductance and capacitance matrix determination. Then accurate signal transients simulation were performed with HSPICE by using the parameters. It was shown that the simulation resutls has an excellent agreement with TDR/TDT measurements.

• 마이크로전자및패키징학회지
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• 제16권4호
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• pp.5-8
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• 2009

In this paper, a high-quality low-temperature co-fired ceramic (LTCC) solenoid inductor using a solder ball and an air cavity on a silicon wafer for three-dimensional (3-D) system-in-package (SiP) is proposed. The LTCC multi-layer solenoid inductor is attached using Ag paste and solder ball on a silicon wafer with the air cavity structure. The air cavity is formed on a silicon wafer through an anisotropic wet-etching technology and is able to isolate the LTCC dielectric loss which is equivalent to a low k material effect. The electrical coupling between the metal layer and the LTCC dielectric layer is decreased by adopting the air cavity. The LTCC solenoid inductor using the solder ball and the air cavity on silicon wafer has an improved Q factor and self-resonant frequency (SRF) by reducing the LTCC dielectric resistance and parasitic capacitance. Also, 3-D device stacking technologies provide an effective path to the miniaturization of electronic systems.