• Title/Summary/Keyword: multi-bit processing

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An Efficient M-way Stream Join Algorithm Exploiting a Bit-vector Hash Table (비트-벡터 해시 테이블을 이용한 효율적인 다중 스트림 조인 알고리즘)

  • Kwon, Tae-Hyung;Kim, Hyeon-Gyu;Lee, Yu-Won;Kim, Myoung-Ho
    • Journal of KIISE:Databases
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    • v.35 no.4
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    • pp.297-306
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    • 2008
  • MJoin is proposed as an algorithm to join multiple data streams efficiently, whose characteristics are unpredictably changed. It extends a symmetric hash join to handle multiple data streams. Whenever a tuple arrives from a remote stream source, MJoin checks whether all of hash tables have matching tuples. However, when a join involves many data streams with low join selectivity, the performance of this checking process is significantly influenced by the checking order of hash tables. In this paper, we propose a BiHT-Join algorithm which extends MJoin to conduct this checking in a constant time regardless of a join order. BiHT-Join maintains a bit-vector which represents the existence of tuples in streams and decides a successful/unsuccessful join through comparing a bit-vector. Based on the bit-vector comparison, BiHT-Join can conduct a hash join only for successful joining tuples based on this decision. Our experimental results show that the proposed BiHT-Join provides better performance than MJoin in the processing of multiple streams.

The Implementation of Multi-Channel Audio Codec for Real-Time operation (실시간 처리를 위한 멀티채널 오디오 코덱의 구현)

  • Hong, Jin-Woo
    • The Journal of the Acoustical Society of Korea
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    • v.14 no.2E
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    • pp.91-97
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    • 1995
  • This paper describes the implementation of a multi-channel audio codec for HETV. This codec has the features of the 3/2-stereo plus low frequency enhancement, downward compatibility with the smaller number of channels, backward compatibility with the existing 2/0-stereo system(MPEG-1 audio), and multilingual capability. The encoder of this codec consists of 6-channel analog audio input part with the sampling rate of 48 kHz, 4-channel digital audio input part and three TMS320C40 /DSPs. The encoder implements multi-channel audio compression using a human perceptual psychoacoustic model, and has the bit rate reduction to 384 kbit/s without impairment of subjective quality. The decoder consists of 6-channel analog audio output part, 4-channel digital audio output part, and two TMS320C40 DSPs for a decoding procedure. The decoder analyzes the bit stream received with bit rate of 384 kbit/s from the encoder and reproduces the multi-channel audio signals for analog and digital outputs. The multi-processing of this audio codec using multiple DSPs is ensured by high speed transfer of date between DSPs through coordinating communication port activities with DMA coprocessors. Finally, some technical considerations are suggested to realize the problem of real-time operation, which are found out through the implementation of this codec using the MPEG-2 layer II sudio coding algorithm and the use of the hardware architecture with commercial multiple DSPs.

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Pre-processing Scheme for Indoor Precision Tracking Based on Beacon (비콘 기반 실내 정밀 트래킹을 위한 전처리 기법)

  • Hwang, Yu Min;Jung, Jun Hee;Shim, Issac;Kim, Tae Woo;Kim, Jin Young
    • Journal of Satellite, Information and Communications
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    • v.11 no.4
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    • pp.58-62
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    • 2016
  • In this paper, we propose a pre-processing scheme for improving indoor positioning accuracy in impulsive noise channel environments. The impulsive noise can be generated by multi-path fading effects by complicated indoor structures or interference environments, which causes an increase in demodulation error probability. The proposed pre-processing scheme is performed before a triangulation method to calculate user's position, and providing reliable input data demodulated from a received signal to the triangulation method. Therefore, we studied and proposed an adaptive threshold function for mitigation of the impulsive noise based on wavelet denoising. Through results of computer simulations for the proposed scheme, we confirmed that Bit Error Rate and Signal-to-Noise Ratio performance is improved compared to conventional schemes.

Performance Evaluation of Wireless Network based on Mobile Multi-hop (모바일 다중 홉 기반의 무선 네트워크의 성능 평가)

  • Roh, Jae-Sung;Kim, Wan-Tae
    • Journal of Advanced Navigation Technology
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    • v.12 no.6
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    • pp.634-639
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    • 2008
  • In mobile communication networks, the main power consumption is due to the actual transmissions power. Therefore, power efficiency network structures have gained considerable importance in mobile multi-hop systems and networks in recent years. In this paper, the performance of mobile multi-hop wireless system with M-QAM signal and forward error control (FEC) technique are analyzed The FEC technique uses extra processing power related to encoding and decoding, it is need complex functions to be built into the communication node. The probability of receiving a correct bit and codeword for relaying a data frame over h hop relay station to the final station is evaluated as a function of channel parameter and number of hops, and the distance between the different station.

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The Design of Multi Channel Receiver for Radar Systems (레이더용 다중채널수신기 설계)

  • Lee, Ki-Hong;Kim, Wan-Sik;Kim, Gye-Kuk
    • Proceedings of the Korean Society of Computer Information Conference
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    • 2010.07a
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    • pp.203-207
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    • 2010
  • In this paper, The design and implementation of Multi Channel Receiver is described in this paper. This Receiver system operates at X-band with processing received signal, more than 80[dB] dynamic range and wide-band signals at the same time. To process direct received signals, this system has the built-in Digital De-modulators which offer the minimum loss on the receiving signal pass and has high stability by adding Built-In Test (BIT). The performance of Multi Receiver is the following. The gain, noise figure, difference of amplitude and phase on the signal pass is respectively $14{\pm}2[dB]$, 19[dB], ${\pm}2[dB]$, and $10^{\circ}$ below.

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Implementation of a G,723.1 Annex A Using a High Performance DSP (고성능 DSP를 이용한 G.723.1 Annex A 구현)

  • 최용수;강태익
    • The Journal of the Acoustical Society of Korea
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    • v.21 no.7
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    • pp.648-655
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    • 2002
  • This paper describes implementation of a multi-channel G.723.1 Annex A (G.723.1A) focused on code optimization using a high performance general purpose Digital Signal Processor (DSP), To implement a multi-channel G.723.1A functional complexities of the ITU-T G.723.1A fixed-point C-code are measures an analyzed. Then we sort and optimize C functions in complexity order. In parallel with optimization, we verify the bit-exactness of the optimized code using the ITU-T test vectors. Using only internal memory, the optimized code can perform full-duplex 17 channel processing. In addition, we further increase the number of available channels per DSP into 22 using fast codebook search algorithms, referred to as bit -compatible optimization.

A Study on Minimization Algorithm for ESOP of Multiple - Valued Function (다치 논리 함수의 ESOP 최소화 알고리즘에 관한 연구)

  • Song, Hong-Bok
    • The Transactions of the Korea Information Processing Society
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    • v.4 no.7
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    • pp.1851-1864
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    • 1997
  • This paper presents an algorithm simplifying the ESOP function by several rules. The algorithm is repeatedly performing operations based on the state of each terms by the product transformation operation of two functions and thus it is simplifying the ESOP function through the reduction of the product terms. Through the minimization of the product terms of the multi-valued input binary multi-output function, an optimization of the input has been done using EXOR PLA with input decoder. The algorithm when applied to four valued arithmetic circuit has been used for a EXOR logic circuit design and the two bits input decoder has been used for a EXOR-PLA design. It has been found from a computer simulation(IBM PC486) that the suggested algorithm can reduce the product terms of the output function remarkably regardless of the number of input variables when the variable AND-EXOR PLA is applied to the poperation circuit.

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Benchmark Results of a Radio Spectrometer Based on Graphics Processing Unit

  • Kim, Jongsoo;Wagner, Jan
    • The Bulletin of The Korean Astronomical Society
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    • v.40 no.2
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    • pp.44.1-44.1
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    • 2015
  • We set up a project to make spectrometers for single dish observations of the Korean VLBI Network (KVN), a new future multi-beam receiver of the ASTE (Atacama Submillimeter Telescope Experiment), and the total power (TP) antennas of the Atacama Large Millimeter/submillimeter Array (ALMA). Traditionally, spectrometers based on ASIC (Application-Specific Integrated circuit) and FPGA (Field-Programmable Gate Array) have been used in radio astronomy. It is, however, that a Graphics Processing Unit (GPU) technology is now viable for spectrometers due to the rapid improvement of its performance. A high-resolution spectrometer should have the following functions: poly-phase filter, data-bit conversion, fast Fourier transform, and complex multiplication. We wrote a program based on CUDA (Compute Unified Device Architecture) for a GPU spectrometer. We measured its performance using two GPU cards, Titan X and K40m, from NVIDIA. A non-optimized GPU code can process a data stream of around 2 GHz bandwidth, which is enough for the KVN spectrometer and promising for the ASTE and ALMA TP spectrometers.

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Improved Wavelet Image Compression Using Correlation of VQ index (VQ 인덱스의 상관도를 이용한 향상된 웨이브렛 영상 압축)

  • Hwang, Jae-Ho;Hong, Chung-Seon;Lee, Dae-Yeong
    • The Transactions of the Korea Information Processing Society
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    • v.7 no.6
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    • pp.1956-1963
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    • 2000
  • In this paper, a wavelet image coding scheme exploiting the correlation of neighboring VQ indices in eh wavelet domain is proposed. the codewords in each sub-codebook are re-ordered in terms of their energies in order to increase the correlation of he indices. Then, the generated indices after VQ can be further encoded by non-adaptive DPCM/Huffman method. LBG algorithm and a fast-PNN algorithm using k-d trees are used for generating a multiresolution codebook. Experimental results show that or scheme outperforms the ordinary wavelet VQ and JPEG at low bit rates.

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Constraint Algorithm in Double-Base Number System for High Speed A/D Converters

  • Nguyen, Minh Son;Kim, Man-Ho;Kim, Jong-Soo
    • Journal of Electrical Engineering and Technology
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    • v.3 no.3
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    • pp.430-435
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    • 2008
  • In the paper, an algorithm called a Constraint algorithm is proposed to solve the fan-in problem occurred in ADC encoding circuits. The Flash ADC architecture uses a double-base number system (DBNS). The DBNS has known to represent the multi-dimensional logarithmic number system (MDLNS) used for implementing the multiplier accumulator architecture of FIR filter in digital signal processing (DSP) applications. The authors use the DBNS with the base 2 and 3 to represent binary output of ADC. A symmetric map is analyzed first, and then asymmetric map is followed to provide addition read DBNS to DSP circuitry. The simulation results are shown for the Double-Base Integer Encoder (DBIE) of the 6-bit ADC to demonstrate an effectiveness of the Constraint algorithm, using $0.18{\mu}\;m$ CMOS technology. The DBIE’s processing speed of the ADC is fast compared to the FAT tree encoder circuit by 0.95 GHz.