• Title/Summary/Keyword: mobile memory

Search Result 569, Processing Time 0.031 seconds

A New Design of Memory-in-Pixel with Modified S-R Flip-Flop for Low Power LCD Panel (저전력 LCD 패널을 위한 수정된 S-R 플립플롭을 가진 새로운 메모리-인-픽셀 설계)

  • Ryu, Jee-Youl;Noh, Seok-Ho
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2008.10a
    • /
    • pp.600-603
    • /
    • 2008
  • In this paper, a new circuit design named memory-in-pixel for low power consumption of the liquid crystal display (LCD) is presented. Since each pixel has a memory, it is able to express 8 color grades using the data saved in the memory without the operation of the gate and source driver ICs so that it can reduce the power consumption of the LCD panel. A memory circuit consists of modified S-R flip-flop (NAND-type) implemented in the pixel, which can supply AC bias for operating the liquid crystal (LC) with the interlocking clocks (CLK_A and CLK_B). This circuit is more complex than the inverter-type memory circuit, but it has lower power consumption of approximately 50% than the circuit. We have investigated the power consumption both NAND and inverter-type memory circuit using a Smart SPICE for the resolution of $96{\times}128$. The estimated power consumption of the inverter-type memory was about 0.037mW. On the other hand, the NAND-type memory showed power consumption of about 0.007mW.

  • PDF

CPWL : Clock and Page Weight based Disk Buffer Management Policy for Flash Memory Systems

  • Kang, Byung Kook;Kwak, Jong Wook
    • Journal of the Korea Society of Computer and Information
    • /
    • v.25 no.2
    • /
    • pp.21-29
    • /
    • 2020
  • The use of NAND flash memory is continuously increased with the demand of mobile data in the IT industry environment. However, the erase operations in flash memory require longer latency and higher power consumption, resulting in the limited lifetime for each cell. Therefore, frequent write/erase operations reduce the performance and the lifetime of the flash memory. In order to solve this problem, management techniques for improving the performance of flash based storage by reducing write and erase operations of flash memory with using disk buffers have been studied. In this paper, we propose a CPWL to minimized the number of write operations. It is a disk buffer management that separates read and write pages according to the characteristics of the buffer memory access patterns. This technique increases the lifespan of the flash memory and decreases an energy consumption by reducing the number of writes by arranging pages according to the characteristics of buffer memory access mode of requested pages.

A Study on the Memory Saturation Prevention of the Entropy Encoder for He HDTV (HDTV용 엔트로피 부호화기의 메모리 포화 방지에 관한 연구)

  • 이선근;임순자;김환용
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.29 no.5A
    • /
    • pp.545-553
    • /
    • 2004
  • Expansion of network environment and multimedia demand universality of application service as HDTV, etc. During these processes, it is essential to process multimedia in real time in the wireless communication system based on mobile phone network and in the wire communication system due to fiber cable and xDSL. So, in this Paper the optimal memory allocation algorithm combines the merit of huffman encoding which is superior in simultaneous decoding ability and lempel-ziv that is distinguished in execution of compress is proposed to improve the channel transmission rate and processing speed in the compressing procedure and is verified in the entropy encoder of HDTV. Because the entropy encoder system using proposed optimal memory allocation algorithm has memory saturation prevention we confirms that the compressing ratio for moving pictures is superior than Huffman encoding and LZW.

A Foresight Study on Strategy of Semiconductor Memory Industry by Performance Analysis of Semiconductor Industry (반도체 산업의 성과 분석을 통한 메모리 산업의 미래 전략 도출)

  • Chung, Euiyoung
    • Journal of Korea Society of Digital Industry and Information Management
    • /
    • v.11 no.4
    • /
    • pp.1-12
    • /
    • 2015
  • This research analyzes the current state of the semiconductor industry delivering the prediction for the future development of the semiconductor industry along with some semiconductor memory's responsive strategies. In the 2014, top 10 semiconductor companies were targeted and studied its growth based on its profitability and growth indications in perspective during three years. The system semiconductor industry with the increase in Hyper-scale customers, proactive actions in the technology consortium, is polarizing caused by increased R&D expense to ensure process scaling limits and high performance, and some results have shown: PC and Mobile slowdown and growth recession phenomenon due to IoT's unclear direction. The leading company is to secure new growth engines through 'Acquiring'. While as the subordinated companies following this consecutive survival through the 'Acquired', the future of system semiconductor industry is to strengthen the market dominance and its techniques by concentrating on the reorganization of the market by few large companies. Accordingly, the semiconductor memory industry is expected to reach the limit of its expansion to domain of system semiconductor, and it is highly suggesting the need of the 'Memory Life Extension' growth strategy.

WAP-LRU: Write Pattern Analysis Based Hybrid Disk Buffer Management in Flash Storage Systems (WAP-LRU : 플래시 스토리지 시스템에서 쓰기 패턴 분석 기반의 하이브리드 디스크 버퍼 관리 기법)

  • Kim, Kyung Min;Choi, Jun-Hyeong;Kwak, Jong Wook
    • IEMEK Journal of Embedded Systems and Applications
    • /
    • v.13 no.3
    • /
    • pp.151-160
    • /
    • 2018
  • NAND flash memories have the advantages of fast access speed, high density and low power consumption, thus they have increasing demand in embedded system and mobile environment. Despite the low power and fast speed gains of NAND flash memory, DRAM disk buffers were used because of the performance load and limited durability of NAND flash cell. However, DRAM disk buffers are not suitable for limited energy environments due to their high static energy consumption. In this paper, we propose WAP-LRU (Write pattern Analysis based Placement by LRU) hybrid disk buffer management policy. Our policy designates the buffer location in the hybrid memory by analyzing write pattern of the workloads to check the continuity of the page operations. In our simulation, WAP-LRU increased the lifetime of NAND flash memory by reducing the number of garbage collections by 63.1% on average. In addition, energy consumption is reduced by an average of 53.4% compared to DRAM disk buffers.

Through Silicon Stack (TSS) Assembly for Wide IO Memory to Logic Devices Integration and Its Signal Integrity Challenges

  • Shin, Jaemin;Kim, Dong Wook
    • The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.24 no.2
    • /
    • pp.51-57
    • /
    • 2013
  • The current expanding mobile markets incessantly demands small form factor, low power consumption and high aggregate throughput for silicon-level integration such as memory to logic system. One of emerging solution for meeting this high market demand is 3D through silicon stacking (TSS) technology. Main challenges to bring 3D TSS technology to the volume production level are establishing a cost effective supply chain and building a reliable manufacturing processes. In addition, this technology inherently help increase number of IOs and shorten interconnect length. With those benefits, however, potential signal and power integrity risks are also elevated; increase in PDN inductance, channel loss on substrate, crosstalk and parasitic capacitance. This paper will report recent progress of wide IO memory to high count TSV logic device assembly development work. 28 nm node TSV test vehicles were fabricated by the foundry and assembled. Successful integration of memory wide IO chip with less than a millimeter package thickness form factor was achieved. For this successful integration, we discussed potential signal and power integrity challenges. This report demonstrated functional wide IO memory to 28 nm logic device assembly using 3D package architecture with such a thin form factor.

A Garbage Collection Method for Flash Memory Based on Block-level Buffer Management Policy

  • Li, Liangbo;Shin, Song-Sun;Li, Yan;Baek, Sung-Ha;Bae, Hae-Young
    • Journal of Korea Multimedia Society
    • /
    • v.12 no.12
    • /
    • pp.1710-1717
    • /
    • 2009
  • Flash memory has become the most important storage media in mobile devices along with its attractive features such as low power consumption, small size, light weight, and shock resistance. However, a flash memory can not be written before erased because of its erase-before-write characteristic, which lead to some garbage collection when there is not enough space to use. In this paper, we propose a novel garbage collection scheme, called block-level buffer garbage collection. When it is need to do merge operation during garbage collection, the proposed scheme does not merge the data block and corresponding log block but also search the block-level buffer to find the corresponding block which will be written to flash memory in the next future, and then decide whether merge it in advance or not. Our experimental results show that the proposed technique improves the flash performance up to 4.6% by reducing the unnecessary block erase numbers and page copy numbers.

  • PDF

Implementation of Light Weight Linux O.S on the Flash Memory (플래쉬 메모리 내에 상주 가능한 경량 리눅스 운영체제 구현)

  • Jang, Seung-Ju
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.11 no.12
    • /
    • pp.2298-2305
    • /
    • 2007
  • Many people is studying the embedded system. The embedded system becomes a small size device. The DOM memory is using in the mobile device and small site devices. This paper proposes light-weighted Linux O.S that is running onto the DOM memory. The embedded system with the DOM must have a light-weigthed O.S due to the memory space restriction. This paper designs light-weigthed Linux O.S for the DOM memory. The new designed LILO boot loader boots the new designed light-weigthed Linux O.S as a normal Linux O.S. This paper experiments comparing the designed new light-weigthed Linux O.S with a Linux PC.

A MDIT(Mobile Digital Investment Trust) Agent design and security enhancement using 3BC and E2mECC (3BC와 F2mECC를 이용한 MDIT(Mobile Digital Investment Trust) 에이전트 설계 및 보안 강화)

  • Jeong Eun-Hee;Lee Byung-Kwan
    • Journal of Internet Computing and Services
    • /
    • v.6 no.3
    • /
    • pp.1-16
    • /
    • 2005
  • This paper propose not only MDIT(Mobile Digital Investment Trust) agent design for Trust Investment under Mobile E-commerce environment, but also the symmetric key algorithm 3BC(Bit, Byte and Block Cypher) and the public encryption algorithm F2mECC for solving the problems of memory capacity, CPU processing time, and security that mobile environment has. In Particular, the MDIT Security Agent is the banking security project that introduces the concept of investment trust in mobile e-commerce, This mobile security protocol creates a shared secrete key using F2mECC and then it's value is used for 3BC that is block encryption technique. The security and the processing speed of MDIT agent are enhanced using 3BC and F2mECC.

  • PDF

An Efficient User Authentication Scheme with Mobile Device in Wireless Network Environment (무선 네트워크 환경에서 모바일 디바이스 기반 효율적인 사용자 인증 기법)

  • Shin, Soobok;Yeh, Hongjin;Kim, Kangseok
    • Journal of the Korea Institute of Information Security & Cryptology
    • /
    • v.23 no.2
    • /
    • pp.169-179
    • /
    • 2013
  • Recently, with rapid advances of mobile devices such as smart phone and wireless networking, a number of services using mobile device based wireless network have been explosively increasing. From the viewpoint of security, because wireless network is more vulnerable than wired network, strong security is required in wireless network. On the contrary, the security for mobile devices has to be efficient due to the restrictions of battery powered mobile device such as low computation, low memory space and high communication cost. Therefore, in this paper, we propose an efficient authentication scheme with mobile devices in wireless network environment. The proposed scheme satisfies security requirements for the service using mobile device and it is suitable in wireless network environment.