• Title/Summary/Keyword: metallization

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A Study of the fracture of intermetallic layer in electroless Ni/Au plating (무전해 니켈/금도금에서의 내부 금속층의 결함에 대한 연구)

  • 박수길;정승준;김재용;엄명헌;엄재석;전세호
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1999.05a
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    • pp.708-711
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    • 1999
  • The Cu/Ni/Au lamellar structure is extensively used as an under bump metallization on silicon file, and on printed circuit board(PCB) pads. Ni is plated Cu by either electroless Ni plating, or electrolytic Ni plating. Unlike the electrolytic Ni plating, the electroless Ni plating does not deposit pure Ni, but a mixture of Ni and phosphorous, because hypophosphite Is used in the chemical reaction for reducing Ni ions. The fracture crack extended at the interface between solder balls of plastic ball grid (PBGA) package and conducting pads of PCB. The fracture is duets to segregation at the interface between Ni$_3$Sn$_4$intermetallic and Ni-P layer. The XPS diffraction results of Cu/Ni/Au results of CU/Ni/AU finishs showed that the Ni was amorphous with supersaturated P. The XPS and EDXA results of the fracture surface indicated that both of the fracture occurred on the transition lesion where Sn, P and Ni concentrations changed.

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PROPERTIES OF PIB-CU FILMS ACCELERATION VOLTAGE AND IONIZATION POTENTIAL

  • Kim, K.H.;Jang, H.G.;Han, S.;Choi, S.C.;Choi, D.J.;Jung, H.J.;Koh, S.K.
    • Journal of Surface Science and Engineering
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    • v.29 no.5
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    • pp.570-576
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    • 1996
  • Cu films for future ULSI metallization were prepared by partially ionized beam (PIB) deposition and characterized in terms of preferred orientation, grain size, roughness and resistivity. PIB-Cu films were prepared on Si (100) at pressure of $8 \times 10^{-7}$~$1 \times 10^{-6}$ Torr. Effects of acceleration voltage and ionization potential on the properties of PIB-Cu films have been investigated. As the acceleration voltage increased at constant ionization potential of 400 V, the degree of preferred orientation and surface smoothness of the Cu film increased. At the ionization potential of 450 V, the degree of preferred orientation at the acceleration voltage higher than 2 kV decreased and surface roughness increased with acceleration voltage. Grain size of Cu films increased to 1100 $\AA$ initially up to applied acceleration voltage of 1 kV, above which a little increase occurred with the acceleration voltage. There was no indication of impurities such as C, O in all sample. Resistivity of Cu film had the same trends as the surface roughness with acceleration voltage and ionization potential. The increase of electrical resistivity of PIB-Cu films was explained in terms of grain size and surface roughness

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Corrosion Protection of Plasma-Polymerized Cyclohexane Films Deposited on Copper

  • Park, Z.T.;Lee, J.H.;Choi, Y.S.;Ahn, S.H.;Kim, J.G.;Cho, S.H.;Boo, J.H.
    • Journal of Surface Science and Engineering
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    • v.36 no.1
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    • pp.74-78
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    • 2003
  • The corrosion failure of electronic devices has been a major reliability concern lately. This failure is an ongoing concern because of miniaturization of integrated circuits (IC) and the increased use of polymers in electronic packaging. Recently, plasma-polymerized cyclohexane films were considered as a possible candidate for a interlayer dielectric for multilever metallization of ultra large scale integrated (ULSI) semiconductor devices. In this paper the protective ability of above films as a function of deposition temperature and RF power in an 3.5 wt.% NaCl solution were examined by polarization measurement. The film was characterized by FTIR spectroscopy and contact angle measurement. The protective efficiency of the film increased with increasing deposition temperature and RF power, which induced the higher degree of cross-linking and hydrophobicity of the films.

Optimization of the firing process condition for high efficiency solar cells on single-crystalline silicon (고효율 Solar Cell 제조를 위한 Firing 공정 조건의 최적화)

  • Jeong, Se-Won;Lee, Seong-Jun;Hong, Sang-Jin;Han, Seung-Su
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2006.10a
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    • pp.4-5
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    • 2006
  • This paper represents modeling and optimization techniques for solar cell process on single-crystalline float zone (FZ) wafers with high efficiency; There were the four significant processes : i)emitter formation by diffusion, anti-reflection-coating (ARC) with silicon nitride using plasma-enhanced chemical vapor deposition (PECVD); iii)screen-printing for front and back metallization; and iv)contact formation by firing. In order to increase the performance of solar cells, the contact formation process is modeled and optimized. This paper utilizes the design of experiments (DOE) in contact formation to reduce process time, fabrication costs. The experiments were designed by using central composite design which is composed of $2^4$ factorial design augmented by 8 axial points with three center points. After contact formation process, the efficiency of the solar cell is modeled using neural networks. This model is used to analyse the characteristics of the process, and to optimize the process condition using genetic algorithms (GA). Finally, find optimal recipe for solar cell efficiency.

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Front Surface Grid Design for High Efficiency Solar Cells

  • Gangopadhyay Utpal;Kim, Kyung-Hae;Basu Prabir Kanti;Dhungel Suresh Kumar;Jung, Sung-Wook;Yia, Jun-Sin
    • Transactions on Electrical and Electronic Materials
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    • v.6 no.2
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    • pp.78-84
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    • 2005
  • Standard crystalline solar cells are generally fabricated with the front grid pattern of silver paste contact. We have reported a detailed theoretical analysis of the proposed segmented cross grid line pattern in this paper. This work was carried out for the optimization of spacing and width of grid finger, main busbar and sub-busbar. The overall electrical and optical losses due to front contact were brought down to $10\%$ or even less as compared to the usual loss of $15\%$ or more in the conventional screen printed silver paste technology by choosing proper grid pattern and optimizing the grid parameters. The total normalized power loss for segmented mesh grid with plated metal contact was also observed and the total power loss could be brought down to $10.04\%$ unlike $11.57\%$ in the case of continuous grid and plated contact. This paper is able to outline the limitations of conventional screen printed contact.

Characterization of Copper Saturated-$Ge_xTe_{1-x}$ Solid Electrolyte Films Incoperated by Nitrogen for Programmable Metalization Cell Memory Device

  • Lee, Soo-Jin;Yoon, Soon-Gil;Yoon, Sung-Min;Yu, Byoung-Gon
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.06a
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    • pp.174-175
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    • 2007
  • A programmable metallization cell (PMC) memory structure with copper-saturated GeTe solid electrolyte films doped by nitrogen was prepared on a TiW bottom electrode by a co-sputtering technique at room temperature. The $Ge_{45}Te_{55}$ solid electrolyte films deposited with various $N_2$/Ar flow ratios showed an increase of crystallization temperature and especially, the electrolyte films deposited at $N_2$/Ar ratios above 30% showed a crystallization temperature above $400^{\circ}C$, resulting in surviving in a back-end process in semiconductor memory devices. The device with a 200 nm thick $Cu_{1-x}(Ge_{45}Te_{55})_x$ electrolyte switches at 1 V from an "off " state resistance, $R_{off}$, close to $10^5$ to an "on" resistance state, Ron, more than 20rders of magnitude lower for this programming current.

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Organic-inorganic Hybrid Dielectric with UV Patterning and UV Curing for Global Interconnect Applications (글로벌 배선 적용을 위한 UV 패턴성과 UV 경화성을 가진 폴리실록산)

  • Song, Changmin;Park, Haesung;Seo, Hankyeol;Kim, Sarah Eunkyung
    • Journal of the Microelectronics and Packaging Society
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    • v.25 no.4
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    • pp.1-7
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    • 2018
  • As the performance and density of IC (integrated circuit) devices increase, power and signal integrities in the global interconnects of advanced packaging technologies are becoming more difficult. Thus, the global interconnect technologies should be designed to accommodate increased input/output (I/O) counts, improved power grid network integrity, reduced RC delay, and improved electrical crosstalk stability. This requirement resulted in the fine-pitch interconnects with a low-k dielectric in 3D packaging or wafer level packaging structure. This paper reviews an organic-inorganic hybrid material as a potential dielectric candidate for the global interconnects. An organic-inorganic hybrid material called polysiloxane can provide spin process without high temperature curing, an excellent dielectric constant, and good mechanical properties.

Fabrication of three-dimensional electrical patterns by swollen-off process: An evolution of the lift-off process

  • Mansouri, Mariam S.;An, Boo Hyun;Shibli, Hamda Al;Yassi, Hamad Al;Alkindi, Tawaddod Saif;Lee, Ji Sung;Kim, Young Keun;Ryu, Jong Eun;Choi, Daniel S.
    • Current Applied Physics
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    • v.18 no.11
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    • pp.1235-1239
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    • 2018
  • We present a novel process to fabricate three-dimensional (3D) metallic patterns from 3D printed polymeric structures utilizing different hygroscopic swelling behavior of two different polymeric materials. 3D patterns are printed with two different polymers as cube shape. The surface of the 3D printed polymeric structures is plated with nickel by an electroless plating method. The nickel patterns on the surface of the 3D printed cube shape structure are formed by removing sacrificial layers using the difference in the rate of hygroscopic swelling between two printing polymer materials. The hygroscopic behavior on the interfaced structure was modeled with COMSOL Multiphysics. The surface and electrical properties of the fabricated three-dimensional patterns were analyzed and characterized.

Electrode-Evaporation Method of III-nitride Vertical-type Single Chip LEDs

  • Kim, Kyoung Hwa;Ahn, Hyung Soo;Jeon, Injun;Cho, Chae Ryong;Jeon, Hunsoo;Yang, Min;Yi, Sam Nyung;Kim, Suck-Whan
    • Journal of the Korean Physical Society
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    • v.73 no.9
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    • pp.1346-1350
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    • 2018
  • An electrode-evaporation technology on both the top and bottom sides of the bare vertical-type single chip separated from the traditional substrate by cooling, was developed for III-nitride vertical-type single chip LEDs with thick GaN epilayer. The post-process of the cooling step was followed by sorting the bare vertical-type single chip LEDs into the holes in a pocket-type shadow mask for deposition of the electrodes at the top and bottom sides of bare vertical-type single chip LEDs without the traditional substrate for electrode evaporation technology for vertical-type single chip LEDs. The variation in size of the hole between the designed shadow mask and the deposited electrodes owing to the use of the designed pocket-type shadow mask is investigated. Furthermore, the electrical and the optical properties of bare vertical-type single chip LEDs deposited with two different shapes of n-type electrodes using the pocket-type shadow mask are investigated to explore the possibility of the e-beam evaporation method.

Criticality analysis of pyrochemical reprocessing apparatuses for mixed uranium-plutonium nitride spent nuclear fuel using the MCU-FR and MCNP program codes

  • P.A. Kizub ;A.I. Blokhin ;P.A. Blokhin ;E.F. Mitenkova;N.A. Mosunova ;V.A. Kovrov ;A.V. Shishkin ;Yu.P. Zaikov ;O.R. Rakhmanova
    • Nuclear Engineering and Technology
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    • v.55 no.3
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    • pp.1097-1104
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    • 2023
  • A preliminary criticality analysis for novel pyrochemical apparatuses for the reprocessing of mixed uranium-plutonium nitride spent nuclear fuel from the BREST-OD-300 reactor was performed. High-temperature processing apparatuses, "metallization" electrolyzer, refinery remelting apparatus, refining electrolyzer, and "soft" chlorination apparatus are considered in this work. Computational models of apparatuses for two neutron radiation transport codes (MCU-FR and MCNP) were developed and calculations for criticality were completed using the Monte Carlo method. The criticality analysis was performed for different loads of fissile material into the apparatuses including overloading conditions. Various emergency situations were considered, in particular, those associated with water ingress into the chamber of the refinery remelting apparatus. It was revealed that for all the considered computational models nuclear safety rules are satisfied.