• The Transactions of the Korea Information Processing Society
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• 제6권8호
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• pp.2245-2252
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• 1999

Since DSM provides a user a simple shared memory abstraction, the user does not have to be concerned with data movement between hosts. Each node in DSM systems has processor, memory, and connection to a network. Memory is divided into pages, and a page can have multiple copies in different nodes. To maintain data consistency between nodes, two conventional protocols are used : write-update protocol and invalidate protocol. The performance of these protocols depends on the system parameters and the memory access patterns. for adapting to memory access patterns, competitive update protocol updates those copies of a page that are expected to be used in the near future, while selectively invalidating other copies. We present weighted competitive update protocols that consider different communication bandwidth for each connection a of two nodes. Test result by simulation show that the weighted competitive update protocol improves performance.

• Journal of Internet of Things and Convergence
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• 제8권5호
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• pp.77-83
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• 2022

Nand flash memory requires an Erase-Before-Write operation structurally. In order to solve this problem, it can be solved by classifying a page (hot data page) where data update operation occurs frequently and storing it in a separate block. The MHF (Multi Hash Function Framework) technique records the frequency of data update requests in the system memory, and when the recorded value exceeds a certain standard, the data update request is judged as hot data. However, the method of simply counting only the frequency of the data update request has a limit in judging it as accurate hot data. In addition, in the case of a technique that determines the persistence of a data update request, the fact of the update request is recorded sequentially based on a time interval and then judged as hot data. In the case of such a persistence-based method, its implementation and operation are complicated, and there is a problem of inaccurate judgment if frequency is not considered in the update request. This paper proposes a lightweight hot data determination technique that considers both frequency and persistence in data update requests.

• IEMEK Journal of Embedded Systems and Applications
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• 제18권1호
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• pp.25-30
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• 2023

We propose a method to update DSP (Digital Signal Processor) firmware using USB (Universal Serial Bus) flash drives. The DSP automatically detects USB drives based on an interrupt when the USB drive is inserted into the USB port. The new firmware binary file is found in the mounted USB drive, and the destination address of DSP flash memory is identified for the firmware update writing by investigating the firmware file header. After the new firmware is written to the DSP flash memory, the DSP is reset and rebooted with the newly updated firmware. By employing TI's TMS320F28379D control card with USB ports, we conduct experiments and verify the normal operation of the implemented method.

• Journal of the Korean Institute of Intelligent Systems
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• 제20권6호
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• pp.761-767
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• 2010

In the case of NAND flash memory, a whole block needs to be erased for update operations because update-in- place operations are not supported in NAND flash memory. Blocks of NAND flash memory have the limited erasure cycles, so frequently updated data (hot data) easily makes blocks worn out. As the result, the capacity of NAND flash memory will be reduced by hot data. In this paper, we propose a wear-leveling algorithm by discriminating hot and cold data based on the update patterns of data. When we applied this scheme to NAND flash memory, we confirmed that the erase counts of blocks became more uniform by mapping hot data to a block with a low erase count and cold data to block with a high erase count.

• Journal of Broadcast Engineering
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• 제27권4호
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• pp.561-568
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• 2022

Most deep learning-based video object segmentation methods perform the segmentation with past prediction information stored in external memory. In general, the more past information is stored in the memory, the better results can be obtained by accumulating evidence for various changes in the objects of interest. However, all information cannot be stored in the memory due to hardware limitations, resulting in performance degradation. In this paper, we propose a method of storing new information in the external memory without additional memory allocation. Specifically, after calculating the attention score between the existing memory and the information to be newly stored, new information is added to the corresponding memory according to each score. In this way, the method works robustly because the attention mechanism reflects the object changes well without using additional memory. In addition, the update rate is adaptively determined according to the accumulated number of matches in the memory so that the frequently updated samples store more information to maintain reliable information.

• Journal of KIISE:Computer Systems and Theory
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• 제37권5호
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• pp.272-284
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• 2010

Flash Memory differs from the hard disk, because it cannot be overwritten. Most of the flash memory file systems use not-in-place update mechanisms for the update. Flash memory file systems execute sometimes block cleaning process in order to make writable space while performing not-in-place update process. Block cleaning process collects the invalid pages and convert them into the free pages. Block cleaning process is a factor that affects directly on the performance of the flash memory. Thus this paper suggests the efficient page allocation method, which reduces block cleaning cost by minimizing the numbers of block that has valid and invalid pages at a time. The result of the simulation shows an increase in efficiency by reducing more block cleaning costs than the original YAFFS.

• Journal of KIISE
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• 제43권9호
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• pp.998-1007
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• 2016

In recent years, the cost of automotive ECU (Electronic Control Unit) has accounted for more than 30% of total car production cost. However, the complexity of testing and debugging an automotive ECU is increasing because automobile manufacturers outsource automotive ECU production. Therefore, a large amount of cost and time are spent to localize faults during testing an automotive ECU. In order to solve these problems, we propose a fault localization method in memory for developers who run the integration testing of automotive ECU. In this method, memory is partitioned by utilizing memory map, and fault-suspiciousness for each partition is calculated by utilizing memory update information. Then, the fault-suspicious region for partitions is decided based on calculated fault-suspiciousness. The preliminary result indicated that the proposed method reduced the fault-suspicious region to 15.01(%) of memory size.

• International Journal of Internet, Broadcasting and Communication
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• 제8권3호
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• pp.12-24
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• 2016

Recently, as the price per bit is decreasing at a fast rate, flash memory is considered to be used as primary storage of large-scale database systems. Although flash memory shows off its high speeds of page reads, however, it has a problem of noticeable performance degradation in the presence of increasing update workloads. When updates are requested for pages with random page IDs, in particular, the shortcoming of flash tends to impair significantly the overall performance of a flash-based database system. Therefore, it is important to have a way to efficiently update the B+-tree, when it is stored in flash storage. This is because most of updates in the B+-tree arise at leaf nodes, whose page IDs are in random. In this light, we propose a new flash B+-tree that stores up-to-date versions of leaf nodes in sibling-leaf blocks (SLBs), while updating them. The use of SLBs improves the update performance of B-trees and provides the mechanism for fast key range searches. To verify the performance advantages of the proposed flash B+-tree, we developed a mathematical performance evaluation model that is suited for assessing B-tree operations. The performance comparisons from it show that the proposed flash B+-tree provides faster range searches and reduces more than 50% of update costs.

• Journal of IKEEE
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• 제5권1호
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• pp.24-34
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• 2001

IP address lookup is a major bottleneck of IP packet processing in high speed router. Existing IP lookup methods are focused only on lookup throughput without considering lookup table update. So their slow update can lead to lookup blocking or wrong routing decision based on obsolete routes. Especially existing IP lookup methods based on CAM(content addressable memory) have slow update of O(n) cycles in spite of their high throughput and low area complexity In this paper we proposes a new IP address lookup method based on pipelined CAM architecture(PICAM) with fast update of O(1) cycle of lookup table and high throughput and low area complexity.

• Journal of the Korea Society of Computer and Information
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• 제22권3호
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• pp.1-8
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• 2017

In this paper, we propose a new hybrid wear leveling technique for NAND Flash memory, called Time-Aware Wear Leveling (TAWL). Our proposal prolongs the lifetime of NAND Flash memory by using dynamic wear leveling technique which considers the wear level of hot blocks as well as static wear leveling technique which considers the wear level of the whole blocks. TAWL also reduces the overhead of garbage collection by separating hot data and cold data using update frequency rate. We showed that TAWL enhanced the lifetime of NAND flash memory up to 220% compared with previous wear leveling techniques and our technique also reduced the number of copy operations of garbage collections by separating hot and cold data up to 45%.