• Journal of information and communication convergence engineering
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• v.5 no.1
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• pp.59-63
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• 2007

In this paper, a CLB-based CPLD low-power technology mapping algorithm considered a Trade-off is proposed. To perform low-power technology mapping for CPLDs, a given Boolean network has to be represented in a DAG. The proposed algorithm consists of three steps. In the first step, TD(Transition Density) calculation has to be performed. Total power consumption is obtained by calculating the switching activity of each node in a DAG. In the second step, the feasible clusters are generated by considering the following conditions: the number of inputs and outputs, the number of OR terms for CLB within a CPLD. The common node cluster merging method, the node separation method, and the node duplication method are used to produce the feasible clusters. In the final step, low-power technology mapping based on the CLBs packs the feasible clusters. The proposed algorithm is examined using SIS benchmarks. When the number of OR terms is five, the experiment results show that power consumption is reduced by 30.73% compared with TEMPLA, and by 17.11 % compared with PLA mapping.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.3
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• pp.377-383
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• 2012

In this paper, a new design of a planar rectenna system and its application to a wake-up receiver operating for incoming signal with a specified frequency are proposed for low-power sensor system applications. The planar and integrable rectenna system is designed with DGSs(Defected Ground Structures) at 2.4 GHz. The DGSs reject harmonic components of 4.8 and 7.2 GHz and eliminate 2.4 GHz fundamental frequency for DC-path filtering. The rectenna system has been evaluated for the conversion output voltages, and applied to the switching of a power supply at the low-power sensor receivers. The proposed system has been evaluated for the wake-up performance by testing a lownoise amplifier operation. From the experimental results, the proposed receiver system presents excellent operation performances.

• Journal of Sensor Science and Technology
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• v.27 no.1
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• pp.59-63
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• 2018

Among Internet of things (IoT) applications, the most demanding requirements for the widespread realization of many IoT visions are security and low power. In terms of security, IoT applications include tasks that are rarely addressed before such as secure computation, trusted sensing, and communication, privacy, and so on. These tasks ask for new and better techniques for the protection of data, software, and hardware. An integral part of hardware cryptographic primitives are secret keys and unique IDs. Physical Unclonable Functions(PUF) are a unique class of circuits that leverage the inherent variations in manufacturing process to create unique, unclonable IDs and secret keys. In this paper, we propose a low power Arbiter PUF circuit with low error rate and high reliability compared with conventional arbiter PUFs. The proposed PUF utilizes a power gating structure to save the power consumption in sleep mode, and uses a razor flip-flop to increase reliability. PUF has been designed and implemented using a FPGA and a ASIC chip (a 0.35 um technology). Experimental results show that our proposed PUF solves the metastability problem and reduce the power consumption of PUF compared to the conventional Arbiter PUF. It is expected that the proposed PUF can be used in systems required low power consumption and high reliability such as low power encryption processors and low power biomedical systems.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.9
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• pp.244-250
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• 2012

This paper describes a 4-Gb/s receiver circuit for a low-swing ground-referenced differential signaling system. The receiver employs a common-gate level-shifter and a continuous linear equalizer which compensates inter-symbol-interference (ISI) and improves voltage and timing margins. A bias circuit maintains the bias current of the level-shifter when the common level of the input signal changes. The receiver is implemented with a low-power 65-nm CMOS technology. When 4-Gb/s 400mVp-p signals are transmitted to the receiver through the channel with the attenuation of -19.7dB, the timing margin based on bit error rate (BER) of $10^{-11}$ is 0.48UI and the power consumption is as low as 0.30mW/Gb/s.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.29 no.9
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• pp.59-64
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• 2015

IEC is an international standards which are used in many countries with Europe as the center. IEC standard is introduced in Korea according to WTO/TBT agreements, however until now there are no buildings in Korea which are designed applying IEC standard. Therefore, KEA(Korea Electric Association) is scheduled to construct Korean low voltage electrical installation integration test site which is designed applying IEC standard. In this paper, before being under construction of Korean low voltage electrical installation integration test site, power substation is modeled based on real design parameters and method to select circuit breakers and cables is presented applying IEC standard in the modeled power substation. EMTP(ElctroMagnetic Transient Program) is used for simulation program. EMTP which is power system analysis program is easy to model power system and power substation.

• Journal of information and communication convergence engineering
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• v.8 no.6
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• pp.651-654
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• 2010

In this paper, we propose two power randomization schemes for the random beamforming (RBF) based MIMO systems in cellular downlink. In the proposed system, a BS randomizes not only the pre-coding matrix but also the power allocation matrix, while the conventional RBF system allocates an equal power to each transmit stream. The proposed water-filling based power randomization scheme (Scheme-I) is proper in the low SNR values and the proposed random-power based randomization scheme (Scheme-II) is proper in the high SNR values. The proposed system with the power randomization outperforms the conventional RBF system which allocates the same power for each data stream.

• Journal of electromagnetic engineering and science
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• v.17 no.4
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• pp.191-196
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• 2017

Microwave wireless power transmission (MWPT) is a promising technique for low and medium power applications such as wireless charging for sensor network or for biomedical chips in case with long ranges or in dispersive media such. A key factor of the MWPT technique is its efficiency, which includes the wireless power transmission efficiency and the radio frequency (RF) to direct current (DC) voltage efficiency of RF-DC converter (which transforms RF energy to DC supply voltage). The main problem in designing an RF-DC converter is the nonlinear characteristic of Schottky diodes; this characteristic causes low efficiency, higher harmonics frequency and a change in the input impedance value when the RF input power changes. In this paper, rather than using harmonic termination techniques of class E or class F power amplifiers, which are usually used to improve the efficiency of RF-DC converters, we propose a new method called "optimal input impedance" to enhance the performance of our design. The results of simulations and measurements are presented in this paper along with a discussion of our design concerning its practical applications.

• The Transactions of the Korean Institute of Power Electronics
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• v.6 no.6
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• pp.474-480
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• 2001

In this paper a low signal reduction communication system that does not use the communication line but power line is presented It will be very useful for an information-oriented society with tele-metering and home automation. The conventional system has a difficulty in transmitting information due to decreasing communication voltage. The proposed system employs a special type switching amplifier system which has a low inner resistance and uses high efficient ferrite core in coupling circuit. This new system is proposed to reduce the loss of conductor load and coupling circuit in a PLC system.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.1
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• pp.97-101
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• 2013

There is a growing need for optical communication systems that convert large volumes of data to optical signals and that accommodate and transmit the signals across long distances. Digital optical communication consists of a master unit (MU) and a slave unit (SU). The MU transmits data to SU using digital optical signals. However, digital optical units that are commercially available or are under development transmit data using two's complement representation. At low input levels, a large number of SSOs (simultaneous switching outputs) are required because of the high rate of bit switching in two's complement, which thereby increases the power noise. This problem reduces the overall system capability because a DSP (digital signal processor) chip (FPGA, CPLD, etc.) cannot be used efficiently and power noise increases. This paper proposes a change from two's complement to a more efficient method that produces less SSO noise and can be applied to existing digital optical units.

• Journal of Power Electronics
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• v.13 no.4
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• pp.528-535
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• 2013

Most eco-friendly cars can adopt the concept of an integrated battery charger (IBC), which uses currently available motor drive systems. The IBC has a lot of strong points such as low cost and minimum space for the high voltage battery charger. On the other hand, it also has some defects caused by its structure. In this paper, the shortcomings of the conventional IBC for PHEVs with interior permanent magnet motors are discussed, and two advanced IBCs with improved performance are presented. Compared with the conventional IBC, the two advanced IBCs have plenty of strengths such as low common noise, high efficiency, simple sensing methods, etc. Then, the digital control algorithm is modified and a power loss calculation is carried out with simulation software. Finally, experimental results are provided to show the performance of the IBC systems.