• 조명전기설비학회논문지
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• 제12권3호
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• pp.67-73
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• 1998

본 연구에서는 기존의 정류회로가 포함하고 있는 고조파 발생과 역률저하문제를 개선하기 위한 방안으로 BPFC(Boost Power Factor Collection)방식을 사용하였다. 이 BPFC는 고역률올 구현하기 위해 가장 널리 쓰이는 방식중의 하나로서 입력전압과 거의 동둥한 지속적인 인덕터 전류를 정현파에 가까운 형태로 제어할 수 있다는 장점을 가지고 있다. 또한 BPFC는 제어방식에 의해 크게 달라질 수 었다. 본 논문에서는 순간모드선택 피크 전류제어방식과 PWM 평균전류 재어방식을 이용한 고역률 저고조파를 갖는 정류회로를 구성하여 각각에 대하여 비교분석하였다.

• 한국통신학회논문지
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• 제22권7호
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• pp.1515-1522
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• 1997

Several image coding algorithms have been developed for the telecommunication and multimedia systems with high image quality and high compression ratio. In order to achieve low entropy and distortion, the system should pay great cost of computation time and memory. In this paper, the uniform cubic lattice is chosen for Lattice Vector Quantization (LVQ) because of its generic simplicity. As a transform coding, the Discrete Wavelet Transform (DWT) is applied to the images because of its multiresolution property. The proposed algorithm is basically composed of the biorthogonal DWT and the uniform cubic LVQ. The multiresolution property of the DWT is actively used to optimize the entropy and the distortion on the basis of the distortion-rate function. The vector codebooks are also designed to be optimal at each subimage which is analyzed by the biorthogonal DWT. For compression efficiency, the vector codebook has different dimension depending on the variance of subimage. The simulation results show that the performance of the proposed coding mdthod is superior to the others in terms of the computation complexity and the PSNR in the range of entropy below 0.25 bpp.

• Journal of Power Electronics
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• 제9권4호
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• pp.593-603
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• 2009

This paper proposes and describes the design and operational principles of a three-phase three-level nine switch voltage source inverter. The proposed topology consists of three bi-directional switches inserted between the source and the full-bridge power switches of the classical three-phase inverter. As a result, a three-level output voltage waveform and a significant suppression of load harmonics contents are obtained at the inverter output. The harmonics content of the proposed multilevel inverter can be reduced by half compared with two-level inverters. A Fourier analysis of the output waveform is performed and the design is optimized to obtain the minimum total harmonic distortion. The full-bridge power switches of the classical three-phase inverter operate at the line frequency of 50Hz, while the auxiliary circuit switches operate at twice the line frequency. To validate the proposed topology, both simulation and analysis have been performed. In addition, a prototype has been designed, implemented and tested. Selected simulation and experimental results have been provided.

• 한국컴퓨터정보학회논문지
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• 제22권11호
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• pp.31-37
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• 2017

In this paper, we propose efficient design and construction of an infrared wide angle optical system with low distortion utilizing a high resolution detector for automobile application. The operational convenience and the recognition ability have been improved significantly by applying the high resolution uncooled thermal detector with wide angle optical design. The active ahtermalization mechanism is implemented so that the adjustment of the optical component of the system is to be made automatically according to the temperature change by motorized control. The modulation transfer function (MTF) is about 50% at the Nyquist frequency close the diffraction limit. The distortion is less than 5% at the edge field. As a result, a high-resolution uncooled thermal optical system with wide field of view (FOV) is assembled, aligned and its performance is tested successfully.

• 전자공학회논문지B
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• 제32B권9호
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• pp.1171-1180
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• 1995

In this paper, we present a 3-D object recognition system in which the 3-D Hough transform domain is employed to represent the 3-D objects. In object modeling step, the features for recognition are extracted from the CAD models of objects to be recognized. Since the approach is based on the CAD models, the accuracy and flexibility are greatly improved. In matching stage, the sensed image is compared with the stored model, which is assumed to yield a distortion (location and orientation) in the 3-D Hough transform domain. The high dimensional (6-D) parameter space, which defines the distortion, is decomposed into the low dimensional space for an efficient recognition. At first we decompose the distortion parameter into the rotation parameter and the translation parameter, and the rotation parameter is further decomposed into the viewing direction and the rotational angle. Since we use the 3-D Hough transform domain of the input images directly, the sensitivity to the noise and the high computational complexity could be significantly alleviated. The results show that the proposed 3-D object recognition system provides a satisfactory performance on the real range images.

• Journal of Electrical Engineering and Technology
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• 제13권1호
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• pp.362-371
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• 2018

This work proposes FPGA implementation of Carrier Disposition PWM for closed loop seven level diode clamped multilevel inverter in speed control of induction motor. VLSI architecture for carrier Disposition have been introduced through which PWM signals are fed to the neutral point seven level diode clamped multilevel using which the speed of the induction motor is controlled. This proposed VLSI architecture makes the power circuit to work better with reduced stresses across the switches and a very low voltage and current total harmonic distortion (THD). The output voltages, currents, torque & speed characteristics for seven level neutral point diode clamped multilevel inverter for AC drive was studied. It has observed the proposed scheme introduces less distortion and harmonics. The results were validated using real time results.

• International Journal of Contents
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• 제17권1호
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• pp.18-26
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• 2021

The obesity leads to be the result of the weakening of anatomical structure as well as the gravity effect. And, the obesity interferes with normal sagittal balance and fails to maintain a straight posture with minimal energy. Therefore, the obesity can be an important factor in causing back pain by changing the lumbar lordosis. In this study, we will present an appropriate angle of incidence for obese people to reduce the image distortion of L4, L5 during a general anteroposterior radiography examination. To reduce image distortion according to the change of lordosis, the angle of incidence was applied 9 ° and 21 ° to L4 and L5 vertebra body when obesity and low back pain (LBP) perform the general anteroposterior radiography examination.

• 디지털융복합연구
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• 제10권5호
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• pp.233-238
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• 2012

유성음원과 무성음원을 시용하는 음성부호화 방식에 있어서, 같은 프레임 안에 모음과 무성자음이 있는 경우에 음성 파형에 일그러짐이 나타난다. 이것을 해결하기 위하여 본 논문에서는 개별피치와 LMS(Least Mean Square)를 적용한 LMS-MPC를 제시하였으며, 기존의 MPC와 LMS-MPC의 SNRseg를 평가한 결과, LMS-MPC의 남자음성에서 1.5dB, 여자음성에서 1.3dB 개선된 것을 확인할 수 있었다. 결국, MPC에 비해 LMS-MPC의 SNRseg가 개선되어 음성파형의 일그러짐을 제어할 수 있었으며, 본 방법은 셀룰러폰이나 스마트폰과 같이 Low Bit Rate의 음원을 사용하여 음성신호를 부호화 하는 방식에 활용할 수 있을 것으로 기대된다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2012년도 추계학술대회 논문집
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• pp.88-90
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• 2012

A study on an integrated single stage AC/DC converter is presented in this paper. The input current can be controlled by the auxiliary winding($L_{aux}$), auxiliary primary winding($N_3$), and the boost inductor($L_B$) which are designed to operate in discontinuous conduction mode(DCM) to reduced the total harmonic distortion(THD) of input current. The auxiliary primary winding($N_3$) is critically selected in order to compress the input capacitor voltage($V_{in}$) as well as to reduce the current stress of the switch(Q). Low total harmonic distortion(THD), low input voltage($V_{in}$) in universal input voltage($V_{AC}$), low current stress at the switching device and high efficiency are the main consideration keys in this design to achieve high performance system with low cost of single stage AC/DC converter. A 30W single stage AC/DC prototype converter is under study.

• JSTS:Journal of Semiconductor Technology and Science
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• 제13권4호
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• pp.318-330
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• 2013

This paper presents a high-linearity low-noise small-size programmable gain amplifier (PGA) based on a new low-noise low-distortion differential amplifier and a proposed reconfiguration technique. The proposed differential amplifier combines an inverter-based differential pair with an adaptive biasing circuit to reduce noise and distortion. The reconfiguration technique saves the chip size by half by utilizing the same differential pair for the input transconductance and load-stage, interchangeably. Fabricated in $0.18-{\mu}m$ CMOS, the proposed PGA shows a dB-linear control range of 21dB in 16 steps from -11 dB to 10 dB with a gain error of less than ${\pm}0.33$ dB, an IIP3 of 7.4~14.5 dBm, a P1dB of -7~1.2 dBm, a noise figure of 13dB, and a 3-dB bandwidth of 270MHz at the maximum gain, respectively. The PGA occupies a chip area of $0.04mm^2$ and consumes only 1.3 mA from the 1.8 V supply.