• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.2
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• pp.194-201
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• 2015

A frequency modulated ultra-wideband (FM-UWB) transmitter with a high-robust relaxation oscillator for subcarrier generation and a dual-path Ring VCO for RF FM is proposed, featuring low power and low complexity. A prototype 3.65-4.25 GHz FM-UWB transceiver employing the presented transmitter is fabricated in $0.18{\mu}m$ CMOS for short-range wireless data transmission. Experimental results show a bit error rate (BER) of $10^{-6}$ at a data rate of 12.5 kb/s with a communication distance of 60 cm is achieved and the power dissipation of 4.3 mW for the proposed transmitter is observed from a 1.8 V supply.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.3
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• pp.313-321
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• 2014

A low-power low-cost polar transmitter for EDGE is designed in $0.18{\mu}m$ CMOS. A differential delta-sigma modulator (DSM) tunes a three-terminal voltage-controlled oscillator (VCO) to perform RF phase modulation, where the VCO tuning curve is digitally pre-compensated for high linearity and the carrier frequency is calibrated by a dual-mode low-power frequency-locked loop (FLL). A digital intermediate-frequency (IF) pulse-width5 modulator (PWM) drives a complementary power-switch followed by an LC filter to achieve envelope modulation with high efficiency. The proposed transmitter with 9mW power dissipation relaxes the time alignment between the phase and envelope modulations, and achieves an error vector magnitude (EVM) of 4% and phase noise of -123dBc/Hz at 400kHz offset frequency.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.9
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• pp.825-833
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• 2016

This paper introduces a direct-conversion CMOS RF transmitter for the IEEE 802.15.4 standard with a low-power high-gain up-conversion mixer designed in $0.18{\mu}m$ process. The designed RF DCT(Direct Conversion Transmitter) is composed of differential DAC(Digital to Analog Converter), passive low-pass filter, quadrature active mixer and drive amplifier. The most important characteristic in designing RF DCT is to satisfy the 2.4 GHz Zigbee standard in low power. The quadrature active mixer inside the proposed RF DCT provides enough high gain as well as sufficient linearity using a gain boosting technique. The measurement results for the proposed transmitter show very low power consumption of 7.8 mA, output power more than 0 dBm and ACPR (Adjacent Channel Power Ratio) of -30 dBc.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.3
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• pp.326-332
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• 2017

A switched VCO-based UWB transmitter for 3-5 GHz is implemented using $0.18{\mu}m$ CMOS technology. Using RF switch and timing control of DPGs, the uniform RF power and low power consumption are possible regardless of carrier frequency. And gate control of RF switch enables the undesired side lobe rejection sufficiently. The measured pulse width is tunable from 0.5 to 2 ns. The measured energy efficiency per pulse is 4.08% and the power consumption is 0.6 mW at 10 Mbps without the buffer amplifier.

• Journal of electromagnetic engineering and science
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• v.2 no.2
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• pp.93-99
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• 2002

The Cartesian loop chip which is one of key devices in narrow-band Walky-Talky transmitter using RZ-SSB modulation method was designed and implemented with 0.35 Um CMOS technology. The reduced size and low cost of transmitter were available by the use of direct-conversion and Cartesian loop chip, which improved the power efficiency and linearity of transmitting path. In addition, low power operation was possible through CMOS technology. The performance test results of transmitter showed -23 dBc improvement of IMD level and -30 dEc below suppression of SSB characteristic in the operation of Cartesian loop chip (closed-loop). At that time, the transmitting power was about 37 dBm (5 W). The main parameters to improve the transmitting characteristic and to compensate the distortion in feed back loop such as DC-offset, loop gain and phase value are interfaced with notebook PC to be controlled with S/W.

• Journal of Positioning, Navigation, and Timing
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• v.10 no.3
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• pp.229-234
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• 2021

In this paper, a study was conducted on the power amplifier control required to design an eLoran transmitter system using a low-height antenna. The eLoran transmitter developed during the eLoran technology development project conducted in Korea used a small 35 m antenna due to the difficulty of securing a site for antenna installation. This antenna height is very low compared to the height of 750 m which is required for eLoran 100 kHz signal transmission without any radiation loss. In the case of using such a small antenna, not only the radiation efficiency of the transmission is lowered, but also the power module control must be performed more precisely in order to transmit the eLoran standard signal. The equivalent RLC circuit of the transmitter system was implemented and transient analysis was conducted to derive the input required voltage for satisfying the output requirement. The voltage waveform was also generated by the RLC circuit analysis to generate the eLoran signal. Furthermore, we suggest power width modulation method to control eLoran power amplifier module more sophisticatedly.

• Journal of Advanced Navigation Technology
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• v.9 no.2
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• pp.121-130
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• 2005

In this paper, we designed and fabricated the VHF wireless transmitter for air traffic control. Fundamental performance of the investigated wireless transmitter is designed and fabricated to satisfy existing commercial wireless transmitter specification for air traffic control. 25 W and 50 W of output power can be generated by changing the power amplification part only. It is based on transmitting voice communication using AM modulation. Investigated wireless transmitter for air traffic control consists of four module parts: power supply, control, low power transmission and power amplification. We designed 1W transmitter to operate without power amplification part. It can be used properly in a basic component of CNS/ATM.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.4
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• pp.272-281
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• 2013

This paper presents low power frequency shift keying (FSK) transmitter using all digital PLL (ADPLL) for smart utility network (SUN). In order to operate at low-power and to integrate a small die area, the ADPLL is adopted in transmitter. The phase noise of the ADPLL is improved by using a fine resolution time to digital converter (TDC) and digitally controlled oscillator (DCO). The FSK transmitter is implemented in $0.18{\mu}m$ 1-poly 6-metal CMOS technology. The die area of the transmitter including ADPLL is $3.5mm^2$. The power consumption of the ADPLL is 12.43 mW. And, the power consumptions of the transmitter are 35.36 mW and 65.57 mW when the output power levels are -1.6 dBm and +12 dBm, respectively. Both of them are supplied by 1.8 V voltage source. The frequency resolution of the TDC is 2.7 ps. The effective DCO frequency resolution with the differential MOS varactor and sigma-delta modulator is 2.5 Hz. The phase noise of the ADPLL output at 1.8 GHz is -121.17 dBc/Hz with a 1 MHz offset.

• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.4
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• pp.282-291
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• 2010

This paper presents a full-CMOS transmitter and receiver for VDSL2 systems. The transmitter part consists of the low-pass filter, programmable gain amplifier (PGA) and 14-bit DAC. The receiver part consists of the low-pass filter, variable gain amplifier (VGA), and 13-bit ADC. The low pass filter and PGA are designed to support the variable data rate. The RC bank sharing architecture for the low pass filter has reduced the chip size significantly. And, the 80 Msps, high resolution DAC and ADC are integrated to guarantee the SNR. Also, the transmitter and receiver are designed to have a wide dynamic range and gain control range because the signal from the VDSL2 line is variable depending on the distance. The chip is implemented in 0.25 ${\mu}m$ CMOS technology and the die area is 5 mm $\times$ 5 mm. The spurious free dynamic range (SFDR) and SNR of the transmitter and receiver are 67.5 dB and 41 dB, respectively. The power consumption of the transmitter and receiver are 160 mW and 250 mW from the supply voltage of 2.5 V, respectively.

• Proceedings of the Korea Society for Industrial Systems Conference
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• 2008.10b
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• pp.629-633
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• 2008

Recently, there has been great interest in the application of short-range wireless communication system. In this paper, the miniaturized FM transmitter with low power is developed, and laboratory tests have been carried out. The FM transmitter uses FM radio waves to send sound from any system (MP3, PMP, PDA, MP3 Phone et.) to any nearby radio or stereo system. The transmitter is designed with $2.6cm{\times}2.6cm{\times}2.6cm$ system size. The operating voltage is 3.7 V and used the built-in storage battery. The system can use continuously during 7 hour with once charging. The transmission frequency can select one of 88.1 MHz, 88.3 MHz, or 88.5 MHz in compliance with utility condition. The channel separation ability is 40 dB. The operating temperature is $-10{\sim}+85^{\circ}C$, which use in the industry environment. Consequently, this system sis used conveniently with short distance information transmitter system at the industry field.