• Title/Summary/Keyword: low phase error

Search Result 274, Processing Time 0.02 seconds

Biased SNR Estimation using Pilot and Data Symbols in BPSK and QPSK Systems

  • Park, Chee-Hyun;Hong, Kwang-Seok;Nam, Sang-Won;Chang, Joon-Hyuk
    • Journal of Communications and Networks
    • /
    • v.16 no.6
    • /
    • pp.583-591
    • /
    • 2014
  • In wireless communications, knowledge of the signal-to-noise ratio is required in diverse communication applications. In this paper, we derive the variance of the maximum likelihood estimator in the data-aided and non-data-aided schemes for determining the optimal shrinkage factor. The shrinkage factor is usually the constant that is multiplied by the unbiased estimate and it increases the bias slightly while considerably decreasing the variance so that the overall mean squared error decreases. The closed-form biased estimators for binary-phase-shift-keying and quadrature phase-shift-keying systems are then obtained. Simulation results show that the mean squared error of the proposed method is lower than that of the maximum likelihood method for low and moderate signal-to-noise ratio conditions.

A Study on the two phase sinusoidal voltage Controlled Oscillator with Low Distortion (저왜율을 갖는 2상정현파 전압제어 발진기에 관한 연구)

  • 이성백;이윤종
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.12 no.5
    • /
    • pp.527-534
    • /
    • 1987
  • Two phase voltage controlled oscillation was realized by using the Electronic analog simulation of nonlinear simultaneous 2st order equation in terms of vibration and it's usefullness was sustined. Sinde it is complex and expensive to implement the circuits actually which composits and multiplicate the two phase signal squared respectively, this paper is obtained the simplificotion and switching circuit. The circuit introducced in this paper had propotionality of frequency to control input voltage, rapid response time, and little phase error, also this circuit operated with very low THD(Total Harmonic Distortion) and constant amplitude at higher than 10 :1 of frequency ratio.

  • PDF

A Study on Detection of Phase Error due to the Doppler Effect with Coding Techniques in Mobile Satellite Communication Network on Interference and Fading Environments (간섭과 페이딩 환경하에서 이동위성 통신망에 부호화 기법을 이용한 도플러 효과에 의한 위상에러 검출에 관한 연구)

  • Cho, Hun-Ju;Kang, Heau-Jo;Choi, Yong-Seok
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.7 no.2
    • /
    • pp.128-138
    • /
    • 1996
  • In this paper, the Doppler phase error due to the relative velocity between a satellite and the earth station in communications using a low earth orbit mobile satellite is detected. The performance of BPSK system in the presence of Rician fading channel environment with Doppler phase error, inter- ference and noise is compared with that of the system disturbed by Doppler phase error and noise only, And adopted coding techniques are Hamming, BCH, RS and convolution codes. The expression of error rate performance of BPSK system is derived as the type of complementary error function. The main conclusion that can be drawn from this analysis is that Rician fading channel environment with Do- ppler phase error and interference, noise effect yields severe performance degradation then Doppler phase error and noise effect in satellite communication channel. The conclusion can be drawn from this analysis is that using coding technique then noncoding. And using the numerical calculation, we give a quantitative insight how much the satellite communication channel parameters degrade the system per- formance. Furthermore it is shown that an appropriate transmission power control for the performance enhancement is beneficial to the new satellite communication system planning.

  • PDF

A High Current Efficiency CMOS LDO Regulator with Low Power Consumption and Small Output Voltage Variation

  • Rikan, Behnam Samadpoor;Abbasizadeh, Hamed;Kang, Ji-Hun;Lee, Kang-Yoon
    • Journal of IKEEE
    • /
    • v.18 no.1
    • /
    • pp.37-44
    • /
    • 2014
  • In this paper we present an LDO based on an error amplifier. The designed error amplifier has a gain of 89.93dB at low frequencies. This amplifier's Bandwidth is 50.8MHz and its phase margin is $59.2^{\circ}C$. Also we proposed a BGR. This BGR has a low output variation with temperature and its PSRR at 1 KHz is -71.5dB. For a temperature variation from $-40^{\circ}C$ to $125^{\circ}C$ we have just 9.4mV variation in 3.3V LDO output. Also it is stable for a wide range of output load currents [0-200mA] and a $1{\mu}F$ output capacitor and its line regulation and especially load regulation is very small comparing other papers. The PSRR of proposed LDO is -61.16dB at 1 KHz. Also we designed it for several output voltages by using a ladder of resistors, transmission gates and a decoder. Low power consumption is the other superiority of this LDO which is just 1.55mW in full load. The circuit was designed in $0.35{\mu}m$ CMOS process.

Refinement of Low Resolution DEM Using Differential Interferometry

  • Kim Chang-Oh;Lee Dong-Cheon;Kim Jeong-Woo;Kim Sang-Wan;Won Joong-Sun
    • Proceedings of the KSRS Conference
    • /
    • 2004.10a
    • /
    • pp.522-525
    • /
    • 2004
  • Interferometry SAR (InSAR) is a technique to generate topographic map from complex data pairs observed by antennas at different locations. However, to obtain topographic information using InSAR is difficult task because it requires series of complicated process including phase unwrapping and precise recovery of the SAR geometry. Especially, accuracy of the DEM (Digital Elevation Model) produced by repeat pass single SAR pair could be influenced by atmospheric effect. Recently, a new InSAR technique to improve accuracy of DEM has been introduced that utilizes low resolution DEM with a number of SAR image pairs. The coarse DEM plays an important role in reducing phase unwrapping error caused by layover and satellite orbit error. In this study, we implemented DInSAR (Differential InSAR) method which combines low resolution DEMs and ERS tandem pair images. GTOPO30 DEM with 1km resolution, SRTM-3 DEM with 100m resolution, and DEM with 10m resolution derived from 1:25,000 digital vector map were used to investigate feasibility of DInSAR. The accuracy of the DEMs generated both by InSAR and DInSAR was evaluated.

  • PDF

Application of Subarray Averaging and Entropy Minimization Algorithm to Stepped-Frequency ISAR Autofocus (부배열 평균과 엔트로피 최소화 기법을 이용한 stepped-frequency ISAR 자동초점 기법 성능 향상 연구)

  • Jeong, Ho-Ryung;Kim, Kyung-Tae;Lee, Dong-Han;Seo, Du-Chun;Song, Jeong-Heon;Choi, Myung-Jin;Lim, Hyo-Suk
    • Proceedings of the KSRS Conference
    • /
    • 2008.03a
    • /
    • pp.158-163
    • /
    • 2008
  • In inverse synthetic aperture radar (ISAR) imaging, An ISAR autofocusing algorithm is essential to obtain well-focused ISAR images. Traditional methods have relied on the approximation that the phase error due to target motion is a function of the cross-range dimension only. However, in the stepped-frequency radar system, it tends to become a two-dimensional function of both down-range and cross-range, especially when target's movement is very fast and the pulse repetition frequency (PRF) is low. In order to remove the phase error along down-range, this paper proposes a method called SAEM (subarray averaging and entropy minimization) [1] that uses a subarray averaging concept in conjunction with the entropy cost function in order to find target motion parameters, and a novel 2-D optimization technique with the inherent properties of the proposed entropy-based cost function. A well-focused ISAR image can be obtained from the combination of the proposed method and a traditional autofocus algorithm that removes the phase error along the cross-range dimension. The effectiveness of this method is illustrated and analyzed with simulated targets comprised of point scatters.

  • PDF

Priority Based Blind Equalization for Hierarchical Modulation Systems (계층변조 시스템에서 신호의 우선순위를 이용한 블라인드 등화)

  • Choi, Un-Rak;Seo, Bo-Seok
    • The Journal of the Korea Contents Association
    • /
    • v.7 no.12
    • /
    • pp.254-261
    • /
    • 2007
  • In this paper, we propose a blind equalization method for advanced terrestrial digital multimedia broadcasting (AT-DMB) systems which use hierarchical modulation. The AT-DMB system adopts hierarchical 16-ary quadrature amplitude modulation (16-QAM) to ensure backward-compatibly with the differential quadrature phase shift keying (DQPSK) signal of the legacy terrestrial digital multimedia broadcasting (T-DMB) systems and to support higher transmission rate. Due to the hierarchical modulation, the conventional T-DMB signal and the additional signal have different error rate at same signal to noise ratio (SNR). By weighting the decided symbols differently according to the reliability of the symbols, i.e., high priority symbol with low error rate and low priority symbol with high error rate, we can improve the channel estimation accuracy. In this paper, we analyze SNR loss by hierarchical modulation and confirm it through simulations. Moreover, through simulations, we verify that the proposed weighting method improve BER compared to the no-weighting method.

The Design of DC-DC Converter with Green-Power Switch and DT-CMOS Error Amplifier (Green-Power 스위치와 DT-CMOS Error Amplifier를 이용한 DC-DC Converter 설계)

  • Koo, Yong-Seo;Yang, Yil-Suk;Kwak, Jae-Chang
    • Journal of IKEEE
    • /
    • v.14 no.2
    • /
    • pp.90-97
    • /
    • 2010
  • The high efficiency power management IC(PMIC) with DTMOS(Dynamic Threshold voltage MOSFET) switching device and DTMOS Error Amplifier is presented in this paper. PMIC is controlled with PWM control method in order to have high power efficiency at high current level. Dynamic Threshold voltage CMOS(DT-CMOS) with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuits consist of a saw-tooth generator, a band-gap reference circuit, an DT-CMOS error amplifier and a comparator circuit as a block. the proposed DT-CMOS Error Amplifier has 72dB DC gain and 83.5deg phase margin. also Error Amplifier that use DTMOS more than CMOS showed power consumption decrease of about 30%. DC-DC converter, based on Voltage-mode PWM control circuits and low on-resistance switching device is achieved the high efficiency near 96% at 100mA output current. And DC-DC converter is designed with Low Drop Out regulator(LDO regulator) in stand-by mode which fewer than 1mA for high efficiency.

Improved Programmable LPF Flux Estimator with Synchronous Angular Speed Error Compensator for Sensorless Control of Induction Motors (유도 전동기 센서리스 제어를 위한 동기 각속도 오차 보상기를 갖는 향상된 Programmable LPF 자속 추정기)

  • Lee, Sang-Soo;Park, Byoung-Gun;Kim, Rae-Young;Hyun, Dong-Seok
    • The Transactions of the Korean Institute of Power Electronics
    • /
    • v.18 no.3
    • /
    • pp.232-239
    • /
    • 2013
  • This paper proposes an improved stator flux estimator through ensuring conventional PLPF to act as a pure integrator for sensorless control of induction motors. Conventional PLPF uses the estimated synchronous speed as a cut-off frequency and has the gain and phase compensators. The gain and phase compensators are determined on the assumption that the estimated synchronous angular speed is coincident with the real speed. Therefore, if the synchronous angular speed is not same as the real speed, the gain and phase compensation will not be appropriate. To overcome the problem of conventional PLPF, this paper analyzes the relationship between the synchronous speed error and the phase lag error of the stator flux. Based on the analysis, this paper proposes the synchronous speed error compensation scheme. To achieve a start-up without speed sensor, the current model is used as the stator flux estimator at the standstill. When the motor starts up, the current model should be switched into the voltage model. So a stable transition between the voltage model and the current model is required. This paper proposes the simple transition method which determines the initial values of the voltage model and the current model at the transition moment. The validity of the proposed schemes is proved through the simulation results and the experimental results.

A Study of the Digital Phase-shift Resonant Converter to Reduce the conduction Loss and Stress of the Switching Device (스위칭 소자의 전도손실과 스트레스를 저감하기 위한 디지털 위상천이 공진형 컨버터에 관한 연구)

  • Shin, Dong-Ryul;Hwang, Young-Min;Kim, Dong-wan;Woo, Jung-In
    • The Transactions of the Korean Institute of Electrical Engineers P
    • /
    • v.51 no.1
    • /
    • pp.10-17
    • /
    • 2002
  • Due to the development of information communication field, the interest of the SMPS(Switched Mode Power Supply) is increased. The size and weight of SMPS are decided by inductor, capacitor and transformer. Thus, the low loss converter which is operated in high speed switching is required. The resonant FB DC-DC converter is able to operate in high speed switching and apply to high power field because the switching loss is low. In this thesis, it is proposed to control strategy for constant output power of resonant FB DC-DC converter in variable input voltage. The proposed control system is a digital I-PD type control and apply to phase-shift resonant type controller. The output voltage tracks reference without steady state error in variable input voltage. The validity of proposed control strategy is verified from results of simulation and experiment.