• 제목/요약/키워드: logic device

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중앙 브릿지 칩셋을 갖춘 Xilinx FPGA, ALTERA CPLD 겸용 Digital Logic Design Training kit (Taining Kit for Xilinx FPGA or ALTERA CPLD Digital Logic Design with Center Bridge Chipset Architecture)

  • 전상현;정완영
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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    • pp.907-910
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    • 2003
  • We have developed Logic Design Training Kit for studying, actual training, designing of FPGA(Xillinx) or CPLD(ALTERA CPLD), the Digital Logic Device. This training kit has 12 matrix keys, RS232 port for serial communication and uses LED array. six FND(Dynamic), LCD as display part. That is standard specification for digital logic training kit. Special point of this kit is that we make two logic device trainig kit. This two logic device kit have more smaller and simple architecture because only uses one chip. That chip already includes a lot of functions that need for training kit, such as : complex logic circuit needed the two kind of logic devices, 16 way of system clock deviding function, serial communication interrupt....etc. We called that one chip is Center Bridge Chipset ; Xillinx FPGA Spartan2. User can select between using one device of FPGA or CPLD, or uses both them. Because of, Center Bridge Chipset has profitable architecture. it can work as Logic Device's networking with Master-Slave connection When using both logic devices.

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아두이노 장치 프로그래밍을 통한 기초 디지털 논리 회로 실습 교육 과정 (Curriculum for Basic Digital Logic Circuit Practices through Arduino Device Programming)

  • 허경
    • 실천공학교육논문지
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    • 제9권1호
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    • pp.41-48
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    • 2017
  • 본 논문에서는 기초 디지털 논리 회로 실습 교육 과정을 설계하기 위해, 디지털 출력을 갖는 아두이노 프로그래밍을 통한 디지털 논리회로 제어 방법을 제안하였다. 디지털 논리회로와 아두이노 프로그래밍 실습은 국내 교육과정의 고등학교 및 대학교의 공학 계열 학과에서 필수 교육과정으로 지정하고 있다. 하지만 실제 실습에는 디지털 논리회로와 아두이노 프로그래밍이 결합된 예제가 부족하고, 디지털 논리회로를 설계하고 오실로스코프 보다 저가의 비용으로 실험할 수 있는 교육 과정이 부족하다. 이에 본 논문에서는 이 문제를 해결하는 디지털 출력 명령을 통한 아두이노 프로그래밍을 통해, 디지털 논리회로를 제어하고 실습해보는 한 학기 기간의 기초 디지털 논리 회로 실습 교육 과정을 제안하였다.

프로그램 가능한 논리 회로 구성을 위한 PIP 앤티퓨즈의 전기적 특성 (Electrical Characteristics of the PIP Antifuse for Configuration of the Programmable Logic Circuit)

  • 김필중;윤중현;김종빈
    • 한국전기전자재료학회논문지
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    • 제14권12호
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    • pp.953-958
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    • 2001
  • The antifuse is a semi-permanent memory device like a ROM which shows the open or short state, and a switch device connecting logic blocks selectively in FPGA. In addition, the antifuse has been used as a logic device to troubleshoot defective memory cells arising from SDRAM processing. In this study, we have fabricated ONO antifuses consisted of PIP structure. The antifuse shows a high resistance more than several G Ω in the normal state, and shows a low resistance less than 500 Ω after program. The program resistance variation according to temperature shows the very stable value of $\pm$20 Ω. At this time, its program voltage shows 6.7∼7.2 V and the program is performed within 1 second. Therefore this result shows that the PIP antifuse is a very stable and programmable logic device.

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PLD 소자의 LASAR 부품 모델링을 통한 고장 검출 (Fault Detection through the LASAR Component modeling of PLD Devices)

  • 표대인;홍승범
    • 한국항행학회논문지
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    • 제24권4호
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    • pp.314-321
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    • 2020
  • LASAR (logic automated stimulus and response) 소프트웨어는 디지털 전자 회로 카드에 대한 로직 기능시험 및 고장검출을 위한 자동점검프로그램 개발도구이다. LASAR 소프트웨어는 소자의 논리회로 기능 및 입·출력 정의된 정보가 필요하다. 소자 정보가 없으면 정상적인 부품 모델링이 불가능하다. 따라서 본 논문에서는 소자 정보가 없는 PLD (programmable logic device) 소자를 역설계 방법을 통하여 부품 모델링을 수행한다. 개발된 LASAR 프로그램은 고장 시뮬레이션 결과와 단일 고착 고장삽입 방법을 통해 고장 검출율을 확인하였다. 고장 검출율은 기존의 제한적인 모델링은 91%, 역설계를 통한 모델링은 94%로 3% 상승하였다. 또한, EP 310 PLD 소자에 대한 입·출력핀에 대한 22가지 고착결함의 경우 100% 검출하여 양호한 성능을 확인하였다.

Comparison study of the future logic device candidates for under 7nm era

  • Park, Junsung
    • EDISON SW 활용 경진대회 논문집
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    • 제5회(2016년)
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    • pp.295-298
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    • 2016
  • Future logic device over the FinFET generation requires a complete electrostatics and transport characteristic for low-power and high-speed operation as extremely scaled devices. Silicon, Germanium and III-V based nanowire-based MOSFET devices and few-layer TMDC (Transition metal dichalcogenide monolayers) based multi-gate devices have been brought attention from device engineers due to those excellent electrostatic and novel device characteristic. In this study, we simulated ultrascaled Si/Ge/InAs gate-all-around nanowire MOSFET and MoS2 TMDC based DG MOSFET and TFET device by tight-binding NEGF method. As a result, we can find promising candidates of the future logic device of each channel material and device structures.

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난방시스템 및 개구부의 통합제어를 위한 규칙기반제어법 및 인공신경망기반제어법의 성능비교 (Development of Integrated Control Methods for the Heating Device and Surface Openings based on the Performance Tests of the Rule-Based and Artificial-Neural-Network-Based Control Logics)

  • 문진우
    • KIEAE Journal
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    • 제14권3호
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    • pp.97-103
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    • 2014
  • This study aimed at developing integrated logic for controlling heating device and openings of the double skin facade buildings. Two major logics were developed-rule-based control logic and artificial neural network based control logic. The rule based logic represented the widely applied conventional method while the artificial neural network based logic meant the optimal method. Applying the optimal method, the predictive and adaptive controls were feasible for supplying the advanced thermal indoor environment. Comparative performance tests were conducted using the numerical computer simulation tools such as MATLAB (Matrix Laboratory) and TRNSYS (Transient Systems Simulation). Analysis on the test results in the test module revealed that the artificial neural network-based control logics provided more comfortable and stable temperature conditions based on the optimal control of the heating device and opening conditions of the double skin facades. However, the amount of heat supply to the indoor space by the optimal method was increased for the better thermal conditioning. The number of on/off moments of the heating device, on the other hand, was significantly reduced. Therefore, the optimal logic is expected to beneficial to create more comfortable thermal environment and to potentially prevent system degradation.

A New Basic Element for Neural Logic Functions and Capability in Circuit Applications

  • Omura, Yasuhisa
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제2권1호
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    • pp.70-81
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    • 2002
  • This paper describes a new basic element which shows a synaptic operation for neural logic applications and shows function feasibility. A key device for the logic operation is the insulated-gate pn-junction device on SOI substrates. The basic element allows an interface quite compatible to that of conventional CMOS circuits and vMOS circuits.

퍼지제어를 이용한 양액 자동공급 시스템 개발 (Development of an Automatic Nutrient-Solution Supply System Using Fuzzy Control)

  • 황호준;류관희;조성인;이규철;김기영
    • Journal of Biosystems Engineering
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    • 제23권4호
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    • pp.365-372
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    • 1998
  • This study was carried out to develop a nutrient-solution mixing-and-supplying system, which used a low-cost metering device instead of expensive metering pumps and a fuzzy logic controller. A low cost and precise overflow-type metering device was developed and evaluated by testing the flow discharge for the automatic nutrient-solution mixing-and-supplying system for snail-scale hydroponic sewers. The fuzzy logic controllers, which could predict and meet the desired values of EC and supply rate of nutrient solution were developed and verified by simulation and experiment. this fuzzy logic controller, whose algorithm consists of four crisp inputs, two crisp outputs and nine rules, was developed to predict the desired value of EC and supply rate of nutrient solution and two crisp inputs, one crisp output and nine rules used to control EC to the desired values. The nutrient-solution mixing-and-supplying system showed satisfactory EC control performance with the maximum overshooting of 0.035 mS/cm and the maximum settling time of 15 minutes in case of increasing 0.7 mS/cm. also, the accuracy of the overflow-type metering device in terms of the full-scale error was 2.29% when using solenoid valve only and 0.2% when using solenoid valve and flow control valve together.

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A Study on the Reactor Protection System Composed of ASICs

  • Kim, Sung;Kim, Seog-Nam;Han, Sang-Joon
    • 한국원자력학회:학술대회논문집
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    • 한국원자력학회 1996년도 추계학술발표회논문집(1)
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    • pp.191-196
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    • 1996
  • The potential value of the Application Specific Integrated Circuits(ASIC's) in safety systems of Nuclear Power Plants(NPP's) is being increasingly recognized because they are essentially hardwired circuitry on a chip, the reliability of the system can be proved more easily than that of software based systems which is difficult in point of software V&V(Verification and Validation). There are two types of ASIC, one is a full customized type, the other is a half customized type. PLD(Programmable Logic Device) used in this paper is a half customized ASIC which is a device consisting of blocks of logic connected with programmable interconnections that are customized in the package by end users. This paper describes the RPS(Reactor Protection System) composed of ASICs which provides emergency shutdown of the reactor to protect the core and the pressure boundary of RCS(Reactor Coolant System) in NPP's. The RPS is largely composed of five logic blocks, each of them was implemented in one PLD, as the followings. A). Bistable Logic B). Matrix Logic C).Initiation Logic D). MMI(Man Machine Interface) Logic E). Test Logic.

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DEVELOPMENT OF RPS TRIP LOGIC BASED ON PLD TECHNOLOGY

  • Choi, Jong-Gyun;Lee, Dong-Young
    • Nuclear Engineering and Technology
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    • 제44권6호
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    • pp.697-708
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    • 2012
  • The majority of instrumentation and control (I&C) systems in today's nuclear power plants (NPPs) are based on analog technology. Thus, most existing I&C systems now face obsolescence problems. Existing NPPs have difficulty in repairing and replacing devices and boards during maintenance because manufacturers no longer produce the analog devices and boards used in the implemented I&C systems. Therefore, existing NPPs are replacing the obsolete analog I&C systems with advanced digital systems. New NPPs are also adopting digital I&C systems because the economic efficiencies and usability of the systems are higher than the analog I&C systems. Digital I&C systems are based on two technologies: a microprocessor based system in which software programs manage the required functions and a programmable logic device (PLD) based system in which programmable logic devices, such as field programmable gate arrays, manage the required functions. PLD based systems provide higher levels of performance compared with microprocessor based systems because PLD systems can process the data in parallel while microprocessor based systems process the data sequentially. In this research, a bistable trip logic in a reactor protection system (RPS) was developed using very high speed integrated circuits hardware description language (VHDL), which is a hardware description language used in electronic design to describe the behavior of the digital system. Functional verifications were also performed in order to verify that the bistable trip logic was designed correctly and satisfied the required specifications. For the functional verification, a random testing technique was adopted to generate test inputs for the bistable trip logic.