• Journal of the Korean Institute of Telematics and Electronics A
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• v.28A no.1
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• pp.40-45
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• 1991

It is well known that the conventional differential source-coupled pair uses gates as its input terminals. This input pair provids a high open-loop gain, a large CMRR, and a good PSRR. For these reasons, the input pair has been used widely as an input stages of the differential amplifiers, but a narrow linear input range of this structurelimits its application in the area of some analog circuit design. A novel CMOS source-coupled backgate pair is proposed in this paper. The bulk of MOSFET is exploited and input devices are biased to operate in ohmic region. With this topology, the backgate pair of the wide linear input range and variable transconductance can be obtained. This backgate input differential stage is realized with the size of W/L=50/25 MOSFETs. The results show the nonlinear error is less than $\gamma$1% over 10V full-scale range for the bias current of 200$\mu$A with 10V single power-supply.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.10
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• pp.8-16
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• 2010

An orthogonal frequency division multiplexing (OFDM) system is a special case of multicarrier transmission, where a single data stream is transmitted over a number of lower-rate subcarriers. One of the main reasons to use OFDM is to increase robustness against frequency-selective fading or narrowband interference. However, in the radio systems the distortion introduced by high power amplifiers (HPA's) such as traveling wave tube amplifier (TWTA) considered in this paper, is also critical. Since the signal amplitude of the OFDM system is Rayleigh-distributed, the performance of the OFDM system is significantly degraded by the nonlinearity of the HPA in the OFDM transmitter. In this paper, we propose a simplicial canonical piecewise-linear (SCPWL) model based digital predistorter to compensate for nonlinear distortion introduced by an HPA in an OFDM system. Computer simulation is carried on an OFDM system under additive white Gaussian noise (AWGN) channels with 16-QAM and 64-QAM modulation schemes and modulator/demodulator implemented with 1024-point FFT/IFFT. The simulation results demonstrate that the proposed predistorter achieves significant performance improvement by effectively compensating for the nonlinearity introduced by the HPA.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.10 no.7
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• pp.1044-1052
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• 1999

A 2-stage 1 watt MMIC(Monolithic Microwave Integrated Circuits) HPA(High Power Amplifiers) at 20 GHz band has been designed and fabricated. The $0.15\mu\textrm{m}$ with the width of $400\mu\textrm{m}$for single device pHEMT technology was used for the fabrication of this MMIC HPA. Due to the series feedback technique from source to ground, bias circuits and stabilization circuits on the main microstrip line, the stability factors(Ks) are more than one at full frequency. The independent operation for each stage and excellent S11, S22 less than -20 dB have been obtained by using lange couplers. For beginning the easy design, linear S-parameters have been extracted from the nonlinear equivalent circuit in foundry library, and equivalent circuits of devices at in/output ports were calculated from this S-parameters. The measured performances, which are in well agreement with the predicted ones, showed the MMIC HPA in this paper has the minimum 15 dB of linear gain, -20 dB of reflection coefficients and 31 dBm of output power over 17~25 GHz.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.4
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• pp.364-375
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• 2014

Parametric array transducers are used for long-range and highly directional communication in an underwater environments. The power amplifiers for parametric array transducers should have sufficient linear output characteristic and high efficiency to avoid communication errors, system heating, and fuel problems. But the conventional power amplifier with fixed source voltage is very low efficient due to large power loss by the big difference between the fixed source voltage and the amplifier output voltage. Thus to solve the problems this paper proposes the high efficiency power amplifier for parametric array transducers. The proposed power amplifier ensures high linearity of output characteristic by utilizing the push-pull class B type amplifier and furthermore gets high efficiency by applying the envelope tracking technique that variable source voltage tracks the envelope of the amplified signal. Also the paper suggests the detailed circuit topology and design guideline of class B push-pull type amplifier and variable output voltage AC/DC converter. Its characteristics are verified by the detailed simulation and experimental results.

• Journal of Electrical Engineering and Technology
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• v.3 no.4
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• pp.566-570
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• 2008

Vertical nanowire SGFETs(Surrounding Gate Field Effect Transistors) provide full gate control over the channel to eliminate short channel effects. This paper presents design and characterization of a differential pair amplifier using NMOS and PMOS SGFETs with a 10nm channel length and a 2nm channel radius. The amplifier dissipates $5{\mu}W$ power and provides 5THz bandwidth with a voltage gain of 16, a linear output voltage swing of 0.5V, and a distortion better than 3% from a 1.8V power supply and a 20aF capacitive load. The 2nd and 3rd order harmonic distortions of the amplifier are -40dBm and -52dBm, respectively, and the 3rd order intermodulation is -24dBm for a two-tone input signal with 10mV amplitude and 10GHz frequency spacing. All these parameters indicate that vertical nanowire surrounding gate transistors are promising candidates for the next generation high speed analog and VLSI technologies.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.7
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• pp.23-29
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• 2011

A dB-linearity improved variable gain amplifier (VGA) for GPS receiver is presented. The Proposed dB-linear current generator has improved dB-linearity error of ${\pm}0.15$dB. The VGA for GPS is designed using proposed dB-linear current generator and composed of 3 stage amplifiers. The IF frequency is assumed as 4MHz and the linearity requirement of the VGA for GPS receiver is defined as 24dBm of IIP3 using cascaded IIP3 equation and the VGA satisfies 24dBm when minimum gain mode. The DC-offset voltage is eliminated using DC-offset cancelation loop. The gain range is from -8dB to 52dB and the dB-linearity error satisfies ${\pm}0.2$dB. The 3-dB frequency has range of 35MHz~106MHz for the gain range. The VGA is designed using 0.18${\mu}m$ CMOS process. The power consumption is 3mW with 1.8V supply voltage.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.2C
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• pp.191-199
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• 2006

In this paper, we propose a method to implement a predistorter of the $rho$-th order inverse filter structure to prevent signal distortion and spectral re-growth due to the high PAPR (peak-to-average ratio) of the OFDM signals and the non-linearity of high-power amplifiers. We model the memory-less non-linearity of the high-power amplifier with a polynomial model and utilize the inverse of the model, the $rho$-th order inverse filter, for the predistorter. Once the non-linearity is modeled with a polynomial, since we can determine the $rho$-th order inverse filter only with the coefficients of the polynomial, large memory is not required. To update the coefficients of the non-linear high-power amplifier model, we can use LMS or RLS algorithms. The convergence speed is high since the number of coefficients is small, and the computation is simple since manipulation of complex numbers is not necessary.

• Journal of Advanced Navigation Technology
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• v.8 no.2
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• pp.184-190
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• 2004

A feedforward linear power amplifier (FLPA) has been developed for UHF-band RFID reader applications. The main and error amplifiers are composed of a 2 stage so that linearity of the FLPA can be improved. The FLPA has been implemented on an FR-4 substrate (Er=4.7 and thickness=0.8 mm) with 3-dB and 10-dB hybrid couplers for input/output power divider and combiner. For 2-tone measurement (input level=-11 dBm at $f_1$=915 MHz and $f_2$=916 MHz), the FLPA exhibits a -18.52 dBm of $IMD_3$, which indicates that $IMD_3$ cancellation with feedforward loop is more than 27 dB. From 890 to 960 MHz, 1-dB gain compression output power and power gain of the FLPA are higher than 30 dBm and 40 dB, respectively.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.23 no.6
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• pp.726-732
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• 2019

In this study, we proposed an asymmetric differential inductor to improve the linearity of differential power amplifiers. Considering the phase error between differential signals of the differential amplifier, the location of the center tap of the differential inductor was modified to minimize the error. As a result, the center tap was positioned asymmetrically inside the differential inductor. With the asymmetric differential inductor, the AM-to-AM and AM-to-PM distortions of the amplifier were suppressed. To confirm the feasibility of the inductor, we designed a 2.4 GHz differential CMOS PA for IEEE 802.11n WLAN applications with a 64-quadrature amplitude modulation (QAM), 9.6 dB peak-to-average power ratio (PAPR), and a bandwidth of 20 MHz. The designed power amplifier was fabricated using the 180-nm RF CMOS process. The measured maximum linear output power was 17 dBm, whereas EVM was 5%.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.8
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• pp.857-864
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• 2010

In this paper, we analyse the effect of the path imbalances(gain and phase mismatches) in LINC(LInear amplification with Nonlinear Component) system, and propose a simple scheme using LUTs(Look Up Table) to compensate the path imbalances. The EVM(Error Vector Magnitude) and ACPR(Adjacent Channel Power Ratio) of the LINC system are degraded significantly by the path imbalances because it adopts an outphasing technique. The EVM and ACPR are theoretically extracted for two variables(gain and phase mismatch factors) and 2-D LUTs for those are generated based on the analysis. The efficient and simple compensation scheme for the path imbalances is proposed using the 2-D LUTs. A LINC system with the suggested compensation scheme is implemented, and the proposed method is verified with an experiment. A 16-QAM signal with 1.5 MHz bandwidth is used. Before the compensation, the path gain ratio was 95 % and phase error was $19.33^{\circ}$. The proposed scheme adjusts those values with 99 % and $0.5^{\circ}$, and improves ACPR about 18.1 dB.