• Journal of Korea Multimedia Society
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• v.20 no.11
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• pp.1803-1810
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• 2017

A large amount of processing time is required if the process of detecting the touch position on the touch screen and displaying it on the display panel is performed only by software. In this paper, we propose a method to output information touched on the screen using H/W method in order to improve the response speed delay. In the FPGA module designed for the HDMI signal output to the display module, the touch information is input to the serial data signal including touch coordinate information, point size, and color information. Then the module render the image using HDMI signal input to the module and the touch information. This method has a pipeline structure so it has effect of reducing the delay time that occurs in outputting the touch information compared with the conventional software processing method.

• Proceedings of the KIEE Conference
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• 2001.11b
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• pp.344-346
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• 2001

The sharing of common corridors by electric power transmission lines and pipelines is becoming more common place. However, such corridor sharing can result in undesired coupling of electromagnetic energy from the power lines to the near facilities. During a fault on any of the transmission lines, energization of the earth by supporting structures near the fault can result in large voltages appearing locally between the earth and the steel wall of any nearby pipeline. This paper presents the outline of the tower footings for the transmission lines having been used in KEPCO and analyzes the earth resistance for operation method of the tower footing, that is contact presence for the anchor and reinforcing rob of the tower and foundation presence of the underground wiring.

• Earthquakes and Structures
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• v.1 no.3
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• pp.253-267
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• 2010

A novel simple approach is presented for the seismic analysis of continuous buried pipelines subject to fault ruptures. The method is based on the minimization of the total dissipated energy during faulting, taking into account the basic factors that affect the problem, namely: a) the pipe yielding under axial and bending load, through the formation of plastic hinges and axial slip; b) the longitudinal friction across the pipe-soil interface; c) the lateral resistance of soil. The advantages and drawbacks of the proposed method are highlighted through a comparison with previous approaches, as well as with finite element calculations accounting for the 3D kinematics of the pipe-soil-fault systems under large deformations. Parametric analyses are also provided to assess the relative influence of the various parameters affecting the problem.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.4
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• pp.318-328
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• 2011

Stage-level reconfigurable chip multiprocessor (CMP) aims to achieve highly reliable and fault tolerant computing by using interwoven pipeline stages and on-chip interconnect for communicating with each other. The existing crossbar-switch based stage-level reconfigurable CMPs offer high reliability at the cost of significant area/power overheads. These overheads make realizing large CMPs prohibitive due to the area and power consumed by heavy interconnection networks. On other hand, area/power-efficient architectures offer less reliability and inefficient stage-level resource utilization. In this paper, I propose a hierarchical multiplexing interconnection structure in lieu of crossbar interconnect to design area/power-efficient stage-level reconfigurable CMP. The proposed approach is able to keep the reliability offered by the crossbar-switch while reducing the area and power overheads. Experimental results show that the proposed approach reduces area by up to 21% and power by up to 32% when compared with the crossbar-switch based interconnection network.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.30B no.7
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• pp.1-13
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• 1993

In this paper, the problems of the conventional special-purpose array processor such as the deficiency of flexibility have been investigated. Then, a new modified methodology has been suggested and applied to obtain the common solution of the three typical App algorithms like SP(Shortest Path), TC(Transitive Closure), and MST(Minimun Spanning Tree) among the various APP algorithms using the similar method to obtain the solution. In the newly proposed APP parallel algorithm, real-time Processing is possible, without the structure enhancement and the functional restriction. In addition, we design 2-demensional bit-parallel low-triangular systolic array processor and the 1-PE in detail. For its evaluation, we consider its computational complexity according to bit-processing method and describe relationship of total chip size and execution time. Therefore, the proposed processor obtains, on which a large data inputs in real-time, 3n-4 execution time which is optimal o(n) time complexity, o(n$^{2}$) space complexity which is the number of total gate and pipeline period rate is one.

• Proceedings of the KIEE Conference
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• summer
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• pp.1364-1366
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• 2004

When an underground pipeline runs parallel with DC-powered railways, it suffers from electrolytic corrosion caused by the stray current leaked from the railway negative returns. Perforation due to the electrolytic corrosion may bring about large-scale accidents even cathodically protected systems. Traditionally, bonding methods such as direct drainage, polarized drainage and forced drainage have been used in order to mitigate the damage on pipelines. In particular, the forced drainage method is widely adopted in Seoul. In this paper, we report the analysis of the stray current conditions in Seoul subway DC electrification system.

• Proceedings of the KIEE Conference
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• 1999.07g
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• pp.2827-2829
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• 1999

Genetic algorithms were described as a method of solving large-scaled optimization problems with complex constraints. It has overcome their slowness, a major drawback of genetic algorithms using hardware implementation of genetic algorithm processor (GAP). In this study, we proposed GAP effectively connecting the goodness of survival-based GA, steady-state GA, tournament selection. Using Pipeline Parallel processing, handshaking protocol effectively, the proposed GAP exhibits 50% speed-up over survival-based GA which runs one million crossovers per second(1MHz). It will be used for high speed processing such of central processor of EHW, robot control and many optimization problem.

• Korean Journal of Remote Sensing
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• v.22 no.5
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• pp.351-356
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• 2006

Based on current practical needs for geo-spatial information on mobile platform, the main theme of this study is a design and implementation of dynamic 3D terrain rendering system using spaceborne imagery, as a kind of texture image for photo-realistic 3D scene generation on mobile environment. Image processing and 3D graphic techniques and algorithms, such as TIN-based vertex generation with regular spacing elevation data for generating 3D terrain surface, image tiling and image-vertex texturing in order to resolve limited resource of mobile devices, were applied and implemented by using graphic pipeline of OpenGL|ES (Embedded System) API. Through this implementation and its tested results with actual data sets of DEM and satellite imagery, we demonstrated the realizable possibility and adaptation of complex typed and large sized 3D geo-spatial information in mobile devices. This prototype system can be used to mobile 3D applications with DEM and satellite imagery in near future.

• Nuclear Engineering and Technology
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• v.53 no.12
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• pp.4060-4066
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• 2021

Flow-accelerated corrosion (FAC) of carbon steel piping is a significant problem in nuclear power plants. The basic process of FAC is currently understood relatively well; however, the accuracy of prediction models of the wall-thinning rate under an FAC environment is not reliable. Herein, we propose a methodology to construct pipe wall-thinning rate prediction models using artificial neural networks and a convolutional neural network, which is confined to a straight pipe without geometric changes. Furthermore, a methodology to generate training data is proposed to efficiently train the neural network for the development of a machine learning-based FAC prediction model. Consequently, it is concluded that machine learning can be used to construct pipe wall thinning rate prediction models and optimize the number of training datasets for training the machine learning algorithm. The proposed methodology can be applied to efficiently generate a large dataset from an FAC test to develop a wall thinning rate prediction model for a real situation.

• International conference on construction engineering and project management
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• 2015.10a
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• pp.317-320
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• 2015

Documenting work-in-progress on construction sites using images captured with smartphones, point-and-shoot cameras, and Unmanned Aerial Vehicles (UAVs) has gained significant popularity among practitioners. The spatial and temporal density of these large-scale site image collections and the availability of 4D Building Information Models (BIM) provide a unique opportunity to develop BIM-driven visual analytics that can quickly and easily detect and visualize construction progress deviations. Building on these emerging sources of information this paper presents a pipeline for model-driven visual analytics of construction progress. It particularly focuses on the following key steps: 1) capturing, transferring, and storing images; 2) BIM-driven analytics to identify performance deviations, and 3) visualizations that enable root-cause assessments on performance deviations. The information requirements, and the challenges and opportunities for improvements in data collection, plan preparations, progress deviation analysis particularly under limited visibility, and transforming identified deviations into performance metrics to enable root-cause assessments are discussed using several real world case studies.