• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.8 no.4
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• pp.53-58
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• 2008

This paper designs sigma-delta D/A Converter with a high resolution and low power consumption. It reorganizes the input data along LJ, RJ, I2S mode and bit mode to the output data of A/D converter. The D/A converter decodes the original analog signal through HBF, Hold and 5th CIFB(Cascaded Integrators with distributed Feedback as well as distributed input coupling) sigma-delta modulation blocks. It uses repeatedly the addition operation in instead of the multiply operation for the chip area and the performance. Also, the half band filters of similar architecture composed the one block and it used the sample-hold block instead of the sinc filter. We supposed simple D/A Converter decreased in area. The filters of the block analyzed using the matlab tool. The top block designed using the top-down method by verilog language. The designed block is fabricated using Samsung 0.35um CMOS standard cell library. The chip area is 1500*1500um.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.3
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• pp.41-50
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• 2010

In this paper, an area-efficient symbol detector is proposed for MIMO communication systems with two transmit and two receive antennas. The proposed symbol detector can support both the spatial multiplexing mode and spatial diversity mode for MIMO transmission technique, and shows the optimal maximum likelihood (ML) performance. Also, by sharing the hardware block with multi-stage pipeline structure and using the complex multiplier based on polar-coordinate，the complexity of the proposed architecture is dramatically decreased. The proposed symbol detector was designed in hardware description language (HDL) and implemented with Xilinx Virtex-5 FPGA. With the proposed architecture, the number of logic slices for the proposed symbol detection is 52490 and the number of DSP48s (dedicated multiplier) is 52, which are reduced by 35.3% and 85.3%, respectively, compared with the conventional architecture.

• Journal of Advanced Navigation Technology
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• v.14 no.2
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• pp.220-226
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• 2010

In this paper, an low power symbol detector is proposed for MIMO communication system with two transmit and two receive antennas. The proposed symbol detector can support both the spatial multiplexing (SM) mode and spatial diversity (SD) mode for MIMO transmission technique, and shows the optimal maximum likelihood (ML) performance. Also, by sharing the hardware block and using the dedicated clock MIMO modes, the power of the proposed architecture is dramatically decreased. The proposed symbol detector was designed in hardware description language (HDL) and synthesized to logic gates using a $0.13-{\mu}m$ CMOS standard cell library. The power consumption was estimated by using Synopsys Power CompilerTM, which is reduced by maximum 85%, compared with the conventional architecture.

• Journal of the Institute of Convergence Signal Processing
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• v.15 no.2
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• pp.42-47
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• 2014

A finger-gesture game controller using the single camera is implemented in this paper, which is based on the recognition of the number of fingers and the index finger moving direction. Proposed method uses the CAMShift algorithm to trace the end-point of index finger effectively. The number of finger is recognized by using a double circle tracing method. Then, HSI color mode transformation is performed for the CAMShift algorithm, and YCbCr color model is used in the double circle tracing method. Also, all processing tasks are implemented by using the Intel OpenCV library and C++ language. In order to evaluate the performance of the proposed method, we developed a shooting game simulator and validated the proposed method. The proposed method showed the average recognition ratio of more than 90% for each of the game command-mode.

• Journal of Information Technology Services
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• v.16 no.3
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• pp.167-183
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• 2017

The rapid growth of information technology and mobile service platforms, i.e., internet, google, and facebook, etc. has led the abundance of data. Due to this environment, the world is now facing a revolution in the process that data is searched, collected, stored, and shared. Abundance of data gives us several opportunities to knowledge discovery and data mining techniques. In recent years, data mining methods as a solution to discovery and extraction of available knowledge in database has been more popular in e-commerce service fields such as, in particular, movie recommendation. However, most of the classification approaches for predicting the movie popularity have used only several types of information of the movie such as actor, director, rating score, language and countries etc. In this study, we propose a classification-based support vector machine (SVM) model for predicting the movie popularity based on movie's genre data and social network data. Social network analysis (SNA) is used for improving the classification accuracy. This study builds the movies' network (one mode network) based on initial data which is a two mode network as user-to-movie network. For the proposed method we computed degree centrality, betweenness centrality, closeness centrality, and eigenvector centrality as centrality measures in movie's network. Those four centrality values and movies' genre data were used to classify the movie popularity in this study. The logistic regression, neural network, $na{\ddot{i}}ve$ Bayes classifier, and decision tree as benchmarking models for movie popularity classification were also used for comparison with the performance of our proposed model. To assess the classifier's performance accuracy this study used MovieLens data as an open database. Our empirical results indicate that our proposed model with movie's genre and centrality data has by approximately 0% higher accuracy than other classification models with only movie's genre data. The implications of our results show that our proposed model can be used for improving movie popularity classification accuracy.

• The KIPS Transactions:PartA
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• v.9A no.1
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• pp.53-60
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• 2002

This paper describes a Gray Mode Graphic STN LCD drive circuit using USB interface. The drive circuit using USB interface can highly transfer image data created under PC t LCD. Hence, the LCD drive circuit doesn't use microprocessor for the convenience of users. The proposed LCD drive circuit part have been verified by simulation and by ALTERA EPF10K10TC144-3 FPGA implementation in VHDL. The USB interface part have been programmed in MS-Visual C++ 6.0. The validity and efficiency of the proposed LCD drive circuit have been verified by test board. After comparing this LCD drive circuit to specify it was verified that the developed LCD drive circuit showed good performances, such as convenience of users, low cost.

• The KIPS Transactions:PartD
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• v.9D no.3
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• pp.511-522
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• 2002

WBI (Web-Based Instruction), a web-based tool for teaching the students at a long distance, makes possible to Interact between learners and instructors, provides a wide variety of learning materials, has an advantage of overcoming spatial constraints. In this paper, as a model of using the web for education, a web-based education-evaluation system has been designed and implemented. Web-based education-evaluation system has to be equipped with both of the online setting question mode and the upload setting question mode, the former makes questions on web and the latter uploads the setted questions on offline with settling a defeat of the existing systems on setting questions. And the system has to be equipped with the function of analyzing the questions that gives teacher several kinds of analysis information and makes possible to feedback to questions by adjusting the difficulty and revising the questions. In this paper, a system that reflects the above requirements has been designed and implemented with PHP script language and MySQL database system.

• Journal of Korea Multimedia Society
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• v.10 no.5
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• pp.604-611
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• 2007

Java Card has gained genera1 acceptance with standard for smart card and (U)SIM technology, and it is in distinction from native card by its post-issuance of an application and independence from hardware platforms. However, a main weak point of Java Card is its low execution speed caused by the hardware limitation and Java programming language itself. In this paper, we propose a new Java Card Installer to improve the download speed during the post-issuance of an application by resolving symbolic references to physical references in HAM. Our Resolution_In_RAM is based on the improved new RAM writing is 100,000 times faster than EEPROM writing and PageBuffer that is operated as block mode, rather than cell mode is used to write to EEPROM. Consequently, the total number of EEPROM writing are reduced 37%, and the times of downloading are reduced over 30% by using the Resolution_In_RAM-based Java Card Installer.

• Journal of IKEEE
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• v.26 no.1
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• pp.27-35
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• 2022

This paper proposes an ultrasound vessel-pattern imaging algorithm with low computational complexity. The proposed imaging algorithm reconstructs blood-vessel patterns by only detecting blood flow, and can be applied to a real-time signal processing hardware that extracts an ultrasonic finger-vessel pattern. Unlike a blood-flow imaging mode of typical ultrasound medical imaging device, the proposed imaging algorithm only reconstructs a presence of blood flow as an image. That is, since the proposed algorithm does not use an I/Q demodulation and detects a presence of blood flow by accumulating an absolute value of the clutter-filter output, a structure of the algorithm is relatively simple. To verify a complexity of the proposed algorithm, a simulation model for finger vessel was implemented using Field-II program. Through the behavioral simulation, it was confirmed that the processing time of the proposed algorithm is around 54 times less than that of the typical color-flow mode. Considering the required main building blocks and the amount of computation, the proposed algorithm is simple to implement in hardware such as an FPGA and an ASIC.

• Journal of the Korean earth science society
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• v.21 no.6
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• pp.719-733
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• 2000

Normally, a digital geologic map can be defined as mappable one whose spatial information with geographic information details and geologic database attribute, recorded in a digital format that is readable by computer. It shows fundamentally two different conceptual perspectives: cartography for digital mapping and analysis for geo-data processing. While, as both aspects basically relate to natural entities and their interpretation of complex features fused with multi-sources, digital geo-data mapping or geologic mapping, it should be distinguished from digital mapping in engineering such as UIS(Urban Infomation System) and AM/FM(Automated Mapping/Facilities Management). Furthermore, according to short-cycled development of GIS(Geographic Information System) software architecture based on IT(Information Technology) and wide expansion of GIS applications' fields, the importance of domain analysis and application model is emphasized at digital geologic informatizaion. In this paper, first terms and concepts of geo-data model with general data modeling aspects are addressed, and then case histories for geo-data modeling and several approaches for data modeling in GIS application fields are discussed. Lastly, tentative conceptual geo-data modeling by using UML(Unified Modeling Language) of OO(Object-oriented) concepts with respect to USGS/AASG geo-data mode is attempted. Through this approach, the main benefits for standardization and implementation lineage with conceptual model in consideration to reusability are expected. Conclusively, it is expected that geo-information system and its architecture by UML is the new coming key approach for the GIS application in geo-sciences.