• Title/Summary/Keyword: ladder diagram

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Mathematical Analysis of Ladder Diagram Games for the introduction of the function (함수의 도입을 위한 사다리타기 게임의 수학적 분석)

  • Lee, Gwangyeon;Lee, Kwangsang;Yoo, Gijong
    • Communications of Mathematical Education
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    • v.27 no.3
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    • pp.267-281
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    • 2013
  • In this paper, we explore the possibility that ladder diagram games can be used for the introduction of the function and composite function. A ladder diagram with at most one rung is a bijection. Thus a ladder diagram with r rungs is the composition of r one-to-one correspondence. In this paper, we use ladder diagrams to give simple proofs of some fundamental facts about one-to-one correspondence. Also, we suggest Story-telling for introduction of function in middle school and high school. The ladder diagram approach to one-to-one correspondence not only grabs our students' attention, but also facilitates their understanding of the concept of functions.

Synthesis of Ladder Diagrams for PLCs Based on Discrete Event Models (이산사건모델에 기반한 PLC 래더다이어그램 자동합성)

  • Kang, Bong-Suk;Cho, Kwang-Hyun
    • Journal of Institute of Control, Robotics and Systems
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    • v.7 no.11
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    • pp.939-943
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    • 2001
  • PLC(programmable Logic Controller)s essential components of modern automation systems encompassing almost every industry. Ladder Diagrams (LD) have been widely used in the design of such PLC since the LD is suitable for the modeling of the sequential control system. However, the synthesis of LD itself mainly depends on the experience of the industrial engineer, which may results in unstructured or inflexible design. Hence, in this paper, we propose a ladder diagram conversion algorithm which systematically produces LDs for PLCs based on discrete event models to enhance the structured and flexible design mechanism.

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LAT System for Fault Tree Generation (PLC로 제어되는 기계에서 Fault Tree를 효과적으로 생성하기 위한 LAT(Ladder Analysis Tool)개발)

  • 김선호;김동훈;김도연;한기상;김주한
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 1997.10a
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    • pp.442-445
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    • 1997
  • A challenging activity in the manufacturing industry is to perform in real time the continuous monitoring of the process state, the situation assessment and identification of the problem on line and diagnosis of the cause and importance of the problem if he process does not work properly. This paper describes LAT(Ladder Analysis Tool) system for fault tree generation to improving the fault diagnosis of CNC machine tools. The system consists of 4 steps which can automatically ladder analysis from ladder diagram to two diagnosis function models. The two diagnostic models based on he ladder diagram is switching function model and step switching function model. This system tries to overcome diagnosis deficiencies present machine tool.

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A Translation Method of Ladder Diagram for High-Speed Programmable Logic Controller (고속 프로그램형 논리 제어기 구현을 위한 래더 다이어그램 해석 방법)

  • 김형석;장래혁;권욱현
    • Journal of Institute of Control, Robotics and Systems
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    • v.5 no.1
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    • pp.33-38
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    • 1999
  • This paper proposes a translation approach for PLCs (Programmable logic controllers) converting ladder diagrams directly to native codes, and describes detailed steps of the method followed by performance evaluation. A general-purpose DSP (Digital signal processor) based implementation validates the approach as well. A benchmark test shows that the Proposed translation framework fairly speeds up execution in comparison with the existing interpretation approach.

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Development of Switching Function Generator for Fault Reasons of CNC Machine Tool (공작기계의 고장원인을 효과적으로 생성하기 위한 Switching Function Generator 개발)

  • 김동훈;김도연;김선호;이은애;한기상
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 2002.04a
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    • pp.48-52
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    • 2002
  • The fault analysis of the CNC machine tool which is controlled sequentially by PLC is generally based on ladder diagram. When machine tool has faults, it takes a lot of operator's experiences and times to identify logical relationship because ladder diagram is a step structured language. Therefore the technologies of finding out fault reasons automatically is necessary. In this paper, the SFG(Switching Function Generator) system is developed to analysis fault reasons correctly. The SF(Switching Function) and SSF(Step Switching Function) generated from SFG based on ladder diagram are experimented to identify the performance of SFG.

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The application of a virtual plant simulator and a Ladder Diagram of PLC (PLC LD 제어언어와 가상 플랜트 시뮬레이터의 적용)

  • Lee, Gi-Bum;Lee, Jin-S.
    • Proceedings of the KIEE Conference
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    • 1999.07b
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    • pp.699-702
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    • 1999
  • This paper represents the application of a virtual plant simulator and a Ladder Diagram of PLC. A target plant is a material transport car that repeatedly conveys along the rails. The whole process is automatically operated by PLC. The simulation system consists of the POSFA PLC and the virtual plant simulator. We demonstrate that operation of a LD program corresponds to operation of the virtual plant simulator.

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A Study On the EMFG Representation of the Relay Circuits and Ladder Diagram

  • Kim, Hee-Jung;Paek, Hyung-Goo;Yeo, Jeong-Mo
    • 제어로봇시스템학회:학술대회논문집
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    • 2001.10a
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    • pp.124.4-124
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    • 2001
  • It needs a skillful experience to design and implement sequential circuits with a relay circuit or LD (Ladder Diagram). One makes out the operation of relay contacts sequentially in case of analyzing a relay circuit or LD. Still more, the design and analyzing of a complex relay circuit or LD are difficult. In this paper, we propose the EMFG (Extended Mark Graph) representation on relay circuits and LD.

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UML-based PLC Ladder Logic Design and Automatic Generation of Ladder Code (UML 기반 PLC 래더 로직 설계와 코드 자동 생성)

  • Han, Kwan-Hee;Park, Jun-Woo
    • Korean Journal of Computational Design and Engineering
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    • v.14 no.1
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    • pp.50-59
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    • 2009
  • There are two main problems in the current PLC ladder programming practices: First, currently there are no widely adopted systematic design methods to deal with PLC based control systems in the shop floor. So, the control logic design phase is usually omitted in current PLC programming development life cycle. Second, PLC ladder logic provides only microscopic view of system processes. As a result, it is difficult for FA engineers to have overall perspectives about the interaction of system components intuitively during the verification step of logic errors. To solve these problems, this paper proposed object-oriented design and automatic generation method of PLC ladder logic. Based on the proposed method, the computer software to assist the automatic ladder logic generation is also developed.

Discrete Event Model Conversion Algorithm for Systematic Analysis of Ladder Diagrams in PLCs (PLC 래더다이어그램의 체계적인 분석을 위한 이산사건모델 변환 알고리즘)

  • Kang, Bong-Suk;Cho, Kwang-Hyun
    • Journal of Institute of Control, Robotics and Systems
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    • v.8 no.5
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    • pp.401-406
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    • 2002
  • As product lifecycles become shorter, factories are pushed to develop small batches of many different products. The highly flexible control systems has become a necessity. The majority of existing automated industrial systems are controlled by programmable logic controllers(PLCs). In most cases, the control programs for PLCs are developed based on ladder diagrams(LDs). However, it is difficult to debug and maintain those LDs because the synthesis of LD itself mainly depends on the experience of the industrial engineer via trial-and-error methods. Hence, in this paper, we propose a discrete event model conversion algorithm for systematic analysis of LDs. The proposed discrete event model conversion algorithm is illustrated by an example of a conveyor system.