• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.1
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• pp.105-110
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• 2005

In this paper, a new technique to reduce the phase noise in microwave oscillators is proposed using the resonant characteristics of the Photonic Bandgap(PBG). We applied PBG structure to ground of the microstrip line resonator with the low Q(Quality factor). Therefore, we improved about 10 dBc in contrast to phase noise characteristic of the conventional microstrip line oscillator at 2.4 GHz ＠ 100 MHz offset. Output power is 7.09 dBm.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.5
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• pp.394-398
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• 2007

A simple doping method to fabricate a very thin channel body of the nano-scaled n-type fin field-effect-transistor (FinFET) by arsenic solid-Phase-diffusion (SPD) process is presented. Using the As-doped spin-on-glass films and the rapid thermal annealing for shallow junction, the n-type source-drain extensions with a three-dimensional structure of the FinFET devices were doped. The junction properties of arsenic doped regions were investigated by using the $n^+$-p junction diodes which showed excellent electrical characteristics. The n-type FinFET devices with a gate length of 20-100 nm were fabricated by As-SPD and revealed superior device scalability.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2001.05a
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• pp.349-352
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• 2001

In this paper, novel device structure in order to realize ultra fast and ultra small silicon devices are investigated using ultra-high vacuum chemical vapor deposition(UHVCVD) and Excimer Laser Annealing (ELA) for ultra pn junction formation. Based on these fundamental technologies for the deep sub-micron device, high speed and low power devices can be fabricated. These junction formation technologies based on damage-free process for replacing of low energy ion implantation involve solid phase diffusion and vapor phase diffusion. As a result, ultra shallow junction depths by ELA are analyzed to 10~20 nm for arsenic dosage (2$\times$10$^{14}$ $\textrm{cm}^2$), excimer laser source(λ=248nm) is KrF, and sheet resistances are measured to 1k$\Omega$/$\square$ at junction depth of 15nm.

• Proceedings of the Korean Institute of Building Construction Conference
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• 2009.11a
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• pp.47-50
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• 2009

The existing techniques used to estimate and manage the compressive strength of concrete do not include the environmental factors that influence the development of compressive strength and the compressive strength itself. Thus, it is necessary to develop a reasonable yet simple way to measure the compressive strength of concrete structures at construction sites by considering concrete's mechanical properties and curing environment. This study was conducted to propose an acrylic form and a junction isolation mold with crack-inducing boards that uses non-destructive methods to create and collect concrete test samples that are cured in the same condition as the actual concrete structures. junction isolation molds were used in high-strength and super high-strength concrete to evaluate the reliability of compressive strength evaluation on the test sample. The following were the findings of this study:

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.23 no.1
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• pp.146-152
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• 2024

This paper presents the analysis and the design methods of the crossover junctions including the output phase. The general solutions were derived analytically through an even-odd analysis of the reflection coefficients and the impedance parameters for the crossover junction with arbitrary output phase. The general solutions were applied to a real crossover junction structure to derive the exact design formula for the arbitrary output phase. The results agreed well with the existing studies. The designed circuit satisfied the crossover junction operation with the exact output phase.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.3
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• pp.387-400
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• 2017

A new junction-splitting based SAR ADC with a redundant searching capacitor array structure in $0.13{\mu}m$ CMOS process to alleviate capacitor mismatch effects, is presented. The normalized average power has a factor of 0.35 to the conventional SAR ADC at 10-bit conversion accuracy. Statistical experiments show the number of missing codes resulting from the mismatch reduces by 95% for 3% unit-capacitor mismatch ratio, while keeping the conversion energy to that of the conventional JS capacitor array.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.7
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• pp.1363-1374
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• 2009

This paper reviews the characteristics and technical trends in Power MOSFET technology that are leading to improvements in power loss for power electronic system. The silicon bipolar power transistor has been displaced by silicon power MOSFET's in low and high voltage system. The power electronic technology requires the marriage of power device technology with MOS-gated device and bipolar analog circuits. The technology challenges involved in combining power handling capability with finger gate, trench array, super junction structure, and SiC transistor are described, together with examples of solutions for telecommunications, motor control, and switch mode power supplies.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.11
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• pp.905-909
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• 2009

The new Junction Field Effect Transistors (JFETs) with Silicon-germanium (SiGe) layers is investigated. This structure uses SiGe layer to prevent out diffusion of boron in the channel region. In this paper, we report electrical properties of SiGe JFET measured under various design parameters influencing the performance of the device. Simulation results show that out diffusion of boron is reduced by the insertion SiGe layers. Because the SiGe layer acts as a barrier to prevent the spread of boron. This proposed JFET, regardless of changes in fabrication processes, accurate and stable cutoff voltage can be controlled. It is easy to maintain certain electrical characteristics to improve the yield of JFET devices.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.2
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• pp.102-106
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• 2005

A low dark current CMOS image sensor (CIS) pixel without any process modification is developed. Dark current is mainly generated at the interface region of shallow trench isolation (STI) structure. Proposed pixel reduces the dark current effectively by separating the STI region from the photodiode junction using simple layout modification. Test sensor array that has both proposed and conventional pixels is fabricated using 0.18 m CMOS process and the characteristics of the sensor are measured. The result shows that the dark current of the proposed pixel is 0.93fA/pixel that is two times lower than the conventional design.

• ETRI Journal
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• v.18 no.4
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• pp.301-313
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• 1997

We have found that in the ballistic electron transport in a ring structure, the junction-backscattering contribution is critical for all the major features of the Aharonov-Bohm-type interference patterns. In particular, by considering the backscattering effect, we present new and clear interpretation about the physical origin of the secondary minima in the electrostatic Aharonov-Bohm effect and that of the h/2e oscillations when both the electric and magnetic potentials are present. We have devised a convenient scheme of expanding the conductance by the junction backscattering amplitude, which enables us to determine most important electron paths among infinitely many paths and to gain insight about their contributions to the interference patterns. Based on the scheme, we have identified various interesting interference phenomena in the ballistic ring structure and found that the backscattering effect plays a critical role in all of them.