• 제목/요약/키워드: junction structure

검색결과 485건 처리시간 0.027초

V-I Curves of p-ZnO:Al/n-ZnO:Al Junction Fabricated by RF Magnetron Sputtering

  • Jin, Hu-Jie;Jeong, Yun-Hwan;Park, Choon-Bae
    • 한국전기전자재료학회논문지
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    • 제21권6호
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    • pp.575-579
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    • 2008
  • Al-doped p-type ZnO films were fabricated on n-Si (100) and homo-buffer layers in pure oxygen at $450^{\circ}C$ of by RF magnetron sputtering. Target was ZnO ceramic mixed with 2 wt% $Al_2O_3$. XRD spectra show that the Al-doped ZnO thin films have ZnO crystal structure and homo-buffer layers are beneficial to Al-doped ZnO films to grow along c-axis. Hall Effect experiments with Van der Pauw configuration show that p-type carrier concentrations are ranged from $1.66{\times}10^{16}$ to $4.04{\times}10^{18}\;cm^{-3}$, mobilities from 0.194 to $2.3\;cm^2V^{-1}s^{-1}$ and resistivities from 7.97 to $18.4\;{\Omega}cm$. p-type sample has density of $5.40\;cm^{-3}$ which is smaller than theoretically calculated value of $5.67\;cm^{-3}$. XPS spectra show that Ols has O-O and Zn-O structures and Al2p has only Al-O structure. P-ZnO:Al/n-ZnO:Al junctions were fabricated by magnetron sputtering. V-I curves show that the p-n junctions have rectifying characteristics.

PLD 법으로 제작한 PbSe 박막의 결정구조와 전기적 특성 (Crystalline structure and electrical properties of PbSe thin films prepared using PLD method)

  • 박종만;이혜연;정중현
    • 센서학회지
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    • 제8권6호
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    • pp.476-480
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    • 1999
  • PLD 법을 이용하여 PbSe 박막을 p-Si(100) 기판 위에 성장시켰다. 성장온도에 따른 박막의 결정구조를 조사하기 위하여 기판온도를 RT${\sim}400^{\circ}C$로 변화시키면서 박막을 제작하였다. 여러 기판온도에서 제작한 PbSe 박막의 XRD 패턴과 PbSe(200) rocking curve의 반치폭(FWHM)을 분석한 결과, 성장온도 $200^{\circ}C$에서 제작한 박막이 가장 양호한 결정성을 나타냈다. 또한 AFM으로 관찰한 PbSe 박막의 표면형태도 $200^{\circ}C$에서 성장시킨 박막의 표면입자들이 가장 규칙적인 배열을 보였다. Hall 측정결과, PbSe 박막은 n-type 반도체임을 알 수 있었고, 전류-전압 특성 곡선은 전형적인 p-n junction 현상을 나타냈다. 또한 n-type 반도체인 PbSe 박막의 전기전도도는 일반적인 반도체의 값보다 약간 큰 것으로 확인되었다.

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Electrical Properties of V-I Curve of p-ZnO:Al/n-ZnO:Al Junction Fabricate by RF Magnetron Sputtering

  • Jin, Hu-Jie;So, Soon-Jin;Song, Min-Jong;Park, Choon-Bae
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2007년도 추계학술대회 논문집
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    • pp.408-409
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    • 2007
  • Al-doped p-type ZnO films were fabricated on n-Si (100) and homo-buffer layers in pure oxygen at $450^{\circ}C$ by RF magnetron sputtering. Target was ZnO ceramic mixed with 2wt% $Al_2O_3$. XRD spectra show that the Al-doped ZnO thin films have ZnO crystal structure and homo-buffer layers are beneficial to Al-doped ZnO films to grow along c-axis. Hall Effect experiments with Van der Pauw configuration show that p-type carrier concentrations are ranged from $1.66{\times}10^{16}\;to\;4.04{\times}10^{18}cm^{-3}$, mobilities from 0.194 to $2.3cm^2V^{-1}s^{-1}$ and resistivities from 7.97 to $18.4{\Omega}cm$. P-type sample has density of $5.40cm^{-3}$ which is smaller than theoretically calculated value of $5.67cm^{-3}$. XPS spectra show that O1s has O-O and Zn-O structures and A12p has only Al-O structure. P-ZnO:Al/n-ZnO:Al junctions were fabricated by magnetron sputtering. V-I curves show that the p-n junctions have rectifying characteristics.

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접합부 유한요소해석을 바탕으로 한 모듈러 구조물의 힌지접합부 수치해석적 연구 (Numerical Analysis of Hinge Joints in Modular Structures Based on the Finite Element Analysis of Joints)

  • 김문찬;홍기섭
    • 한국전산구조공학회논문집
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    • 제35권1호
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    • pp.15-22
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    • 2022
  • 본 논문에서는 유한요소해석을 통한 모듈러 구조물 접합부의 힌지접합부 연구에 관하여 소개한다. 모듈러 구조물은 모듈과 모듈을 적층하는 방식으로 공사를 진행하여 단위 모듈간의 기둥 및 보의 일체성을 기대하기 어려운 특성을 가지고 있다. 그러나 현 모듈러 설계 시 이러한 구조적 특성을 무시하고 횡력에 대한 모멘트전달을 고려하여 기존 강구조와 동일한 방식으로 해석하고 있다. 더구나 모멘트접합을 체결하기위해 모듈러 외부뿐만 아니라 내부에서 볼트 체결이 이루어져 조립 후 마감을 추가하는 불합리한 상황도 발생한다. 이러한 일체성을 기대하기 어려운 특성을 고려하기 위하여 힌지접합을 활용한 모듈러구조시스템을 제안하였다. 논문에서는 기존의 모멘트접합부에서 힌지접합부로 변경하였을 때 하중의 전달을 확인하기 위하여 이전 다른 연구에서 활용되었던 가위 모델을 변형한 변형 가위 모델을 고안하여 접합부의 기본 이론을 제안·검토하였고, 기본을 바탕으로 계산된 결과는 구조해석 프로그램인 마이다스 젠과 비교하여 검증하였다. 추가적으로 기존 모멘트접합부로 설계되었던 모듈러구조물을 힌지접합부로 변경하여 부재내력 및 사용성을 검토하였다.

SOI 트렌치-모스 바이폴라-모드 전계효과 트랜지스터 구조의 설계 및 수치해석 (Design and Numerical Analyses of SOI Trench-MOS Bipolar-Mode Field Effect Transistor)

  • 김두영;오재근;한민구;최연익
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제49권5호
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    • pp.270-277
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    • 2000
  • A new Lateral Trench-MOS Bipolar-Mode Field-Effect Transistor(LTMBMFET) is proposed and verified by MEDICI simulation. By using a trench MOS structure, the proposed device can enhance the current gain without sacrificing other device characteristics such as the breakdown voltage. The channel region of the proposed device is formed between the trench MOS structure. So the effect of the substrate voltage is negligible when compared with the conventional device which has a channel region between the gate junction and the buried oxide layer.

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브레이스로 보강된 사각형 래티스돔의 좌굴내력 평가 (An Estimation of Buckling-Strength of Braced Rectangular Latticed Domes)

  • 황영민;석창목;박상훈
    • 한국공간구조학회논문집
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    • 제3권4호
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    • pp.69-76
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    • 2003
  • In case of rectangular latticed pattern which shearing rigidity is very small, it has a concern to drop Buckling-strength considerably by external force. So, by means of system to increase buckling-strength, there is a method of construction that lattice of dome is reinforced by braced member. In a case like this, shearing rigidity of braced member increase buckling-strength of the whole of structure and can be designed economically from the viewpoint of practice. Therefore, this paper is aimed at investigating how much does rigidity of braced member united with latticed member bearing principal stress of dome increase buckling-strength of the whole of structure. the subject of study is rectangular latticed domes that are a set of 2-way lattice dome which grid is simple and number of member gathering at junction is small. Analysis method is based on FEM dealing with the geometrically nonlinear deflection problems.

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새로운 구조의 ESD 보호소자를 내장한 고속-저전압 LVDS Driver 설계 (Design of high speed-low voltage LVDS driver circuit with the novel ESD protection device)

  • 이재현;김귀동;권종기;구용서
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2005년도 추계종합학술대회
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    • pp.731-734
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    • 2005
  • In this study, the design of advanced LVDS(Low Voltage Differential Signaling) I/O interface circuit with new structural low triggering ESD (Electro-Static Discharge) protection circuit was investigated. Due to the differential transmission technique and low power consumption at the same time. Maximum transmission data ratio of designed LVDS transmitter was simulated to 5Gbps. And Zener Triggered SCR devices to protect the ESD phenomenon were designed. This structure reduces the trigger voltage by making the zener junction between the lateral PNP and base of lateral NPN in SCR structure. The triggering voltage was simulated to 5.8V. Finally, we performed the layout high speed I/O interface circuit with the low triggered ESD protection device in one-chip.

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Improving Device Efficiency for n-i-p Type Solar Cells with Various Optimized Active Layers

  • Iftiquar, Sk Md;Yi, Junsin
    • Transactions on Electrical and Electronic Materials
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    • 제18권2호
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    • pp.70-73
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    • 2017
  • We investigated n-i-p type single junction hydrogenated amorphous silicon oxide solar cells. These cells were without front surface texture or back reflector. Maximum power point efficiency of these cells showed that an optimized device structure is needed to get the best device output. This depends on the thickness and defect density ($N_d$) of the active layer. A typical 10% photovoltaic device conversion efficiency was obtained with a $N_d=8.86{\times}10^{15}cm^{-3}$ defect density and 630 nm active layer thickness. Our investigation suggests a correlation between defect density and active layer thickness to device efficiency. We found that amorphous silicon solar cell efficiency can be improved to well above 10%.

개구-정합 형태를 갖는 UWB용 슬롯 안테나의 설계 (Dsign of Aperture-Matched type Slot Antenna for Ultra Wide-Band)

  • 문병인;김호용;이홍민
    • 한국전자파학회:학술대회논문집
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    • 한국전자파학회 2005년도 종합학술발표회 논문집 Vol.15 No.1
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    • pp.217-220
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    • 2005
  • In this paper describes novel m antenna using aperture matched type slot structure. It substitutes edge diffractions by curved-surface diffractions which have a tendency to provide an undisturbed energy flow across the junction, around the curved surface, and into free-space. The proposed antenna is composed of a CPW feed structure, exponential tapered slot and the curved sectional at the edge. experimental resulte show that aperture matched type slot improve the performance of the UWB antenna.

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광전자집적회로를 위한 InP JFET의 제작 및 특성 분석 (Fabrication and Characterization of InP JFET's for OEIC's)

  • 박철우;정창오;김성준
    • 전자공학회논문지A
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    • 제29A권10호
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    • pp.29-34
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    • 1992
  • JFET's with gate lengths ranging from 1$\mu$m to 8.3$\mu$m are successfully fabricated on InP substrate where the long haul (1.3$\mu$m~8.3$\mu$m) OEIC's(OptoElectronic Integrated Circuits) have been made. The pn junction of InP JFET's is made by co-implantation and RTA process. JFET's have etched-mesa-gate structure and the maximum gm larger than 90mS/mm was measured and this is the highest record in JFET's of such structure without S/D n$^{+}$ ion implantation. To maintain maximum g$_m$ should be well controlled the overetch of n-layer which inevitably occurs during etching off the unused p-layer. The I-V characteristic is checked during p-layer etch, for this purpose. A dc voltage gain of 11 is obtained from a preamplifier circuit thus fabricated.

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