• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.1
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• pp.114-121
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• 2003

In this paper, low voltage and two stage CMOS Class E RF power amplifier for ISM(Industrial/Scientific/Medical) Open Band is presented. The power amplifier operates at 2.4GHz frequency, and is designed and simulated with a 0.35um CMOS technology and HSPICE simulator. The power amplifier is simple structure of two stage Class E power amplifier. The design procedure determing matching network was presented. The power amplifier is composed of input stage matching network, preamplifier, interstage matching network, power amplifier, and output stage matching network. The matching networks of input stage and interstage were constituted by pi($\pi$) type and L type respectively. At 2.4GHz operating frequency, and with a 2.5V supply voltage, the power amplifier delivers 23dBm output power to a 50${\Omega}$ load with 39% power added efficiency(PAE).

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.10
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• pp.24-31
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• 1997

A new design method of stable RF power amplifier using 3dB coupled line is proposed in this thiesis. The proposed method of broadband matching consist of resistive matching circuits at low frequency and lossless matching circuits at microwave band. This design method increase the stability of an amplifier and is suitable for interstage matching. When high power amplifier is designed using this method for PCS base transceiver station, the measured resutls show thst the gain of 18.5dB, and 9W (39.5dBm) output power. We use motorola's MRF6401 for medium power and MRF 6402 for large power and cascaded them.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.9
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• pp.1344-1350
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• 1990

A design method of ultra-broadband microwave amplifier is presented. A lossy network is represented as the combination of a serial impedance component and a parallel admittance component, and the realizable ranges of the gain and the reflection coefficients are derived with the components connected to the input, output or interstage network. The matching network has been designed by using the serial and parallel immittance loci which have the constant gain or reflection coefficients within the realizable ranges. Using the proposed method, deisgn examples of ultra-broadband amplifiers operating from dc to 12GHz frequency range are presented.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.11
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• pp.89-94
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• 2007

For successful implementation of multi-standard transmitter, reconfigurable architecture and component design are essential. This paper presents a reconfigurable CMOS power amplifier designed CMOS 0.25 um process. Designed power amplifier can be operated at 0.9, 1.2, 1.75, and 1.85 GHz. Also, it can be used at 2.4 GHz by using bonding wire inductor. The interstage matching network is composed of two inductors and four switches, and operation frequency can be varied by controlling switches. Proposed power amplifier can be used as a power amplifier in low power applications such as ZigBee or Bluetooth application and used as a driver amplifier in high power application such as CDMA application. Designed power amplifier has 18.2 dB gain and 10.3 dBm output power at 0.9 GHz. Also, it represented 10.3 (18.1) dB gain and 5.2 (10) dBm output power at 1.75 (2.4) GHz.

• ETRI Journal
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• v.42 no.5
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• pp.781-789
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• 2020

In this study, an E-band low-noise amplifier (LNA) monolithic microwave integrated circuit (MMIC) has been designed using silicon-germanium 130-nm bipolar complementary metal-oxide-semiconductor technology to suppress unwanted signal gain outside operating frequencies and improve the signal gain and noise figures at operating frequencies. The proposed impedance-controllable filter has series (R_s) and parallel (R_p) resistors instead of a conventional inductor-capacitor (L-C) filter without any resistor in an interstage matching circuit. Using the impedance-controllable filter instead of the conventional L-C filter, the unwanted high signal gains of the designed E-band LNA at frequencies of 54 GHz to 57 GHz are suppressed by 8 dB to 12 dB from 24 dB to 26 dB to 12 dB to 18 dB. The small-signal gain S₂₁ at the operating frequencies of 70 GHz to 95 GHz are only decreased by 1.4 dB to 2.4 dB from 21.6 dB to 25.4 dB to 19.2 dB to 24.0 dB. The fabricated E-band LNA MMIC with the proposed filter has a measured S₂₁ of 16 dB to 21 dB, input matching (S₁₁) of -14 dB to -5 dB, and output matching (S₂₂) of -19 dB to -4 dB at E-band operating frequencies of 70 GHz to 95 GHz.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.2
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• pp.276-283
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• 2003

In this paper, a 2-stage power amplifier(PA) for IMT-2000 handset has been designed and fabricated using SiGe HBT, which has excellent frequency characteristics and linearity, to reduce size and weight instead of existing linearization techniques. DC I-V characteristics and S-parameter of SiGe HBT were simulated by Agilent circuit simulator(ADS), with large signal Gummel-Poon nonlinear circuit model. Then the output and interstage matching circuits were designed to satisfy the high power condition and the high gain condition, respectively. The experimental results showed output power of 27.1dBm and ACLR of 20dB, PAE of 34%, and linear power gain of 18.9dB over frequency ranges from 1920MHz to 1980MHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.1
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• pp.102-109
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• 2000

In this paper, a Low Noise Amplifier for B-WLL was designed using the MMIC technology with GaAs PHEMTs fabricated at our lab. The PHEMT for LNA has a $0.35\mu\textrm{m}$ gate and a total gate width of $120\mu\textrm{m}$. The designed MMIC LNA consists of three stages. The first stage of the LNA has a series inductive feedback for obtaining minimum noise and high stability as well. And the designed MMIC LNA has not an interstage matching circuit between the second and the third stage for minimization of the chip size. From simulation results, noise figure and S21 gain of the designed MMIC LNA are 0.85~1.25 dB and 22.08~23.65 dB in the frequency range of 25.5~27.5 GHz respectively. And the chip size is $3.7\times1.6 mm^2$.