• Title/Summary/Keyword: instruction model

Search Result 717, Processing Time 0.024 seconds

A Search for Mathematics Teaching Models for Elementary Schools (현장에 적합한 초등 수학 수업 모형 탐색)

  • Seo, Dong Yeop
    • Journal of Educational Research in Mathematics
    • /
    • v.25 no.3
    • /
    • pp.407-429
    • /
    • 2015
  • This study aims to find the elementary mathematics teachers' satisfaction, availability, and needs, based on the mathematics teaching models in current mathematics curriculum. The satisfaction on current mathematics teaching models is about 80%, but the frequency of usage of the models is a bit low because the models are used once a unit or a semester. Among other subjects, the teachers prefer the teaching models of social studies or science, because the models are convenient in applying models to their teaching. We proposed a few ideas to enhance the availability of mathematics teaching models including the consideration on a variety of content areas of mathematics, students' differences of their mathematics levels, and the teaching and learning methods in mathematics curriculum.

An Interference Matrix Based Approach to Bounding Worst-Case Inter-Thread Cache Interferences and WCET for Multi-Core Processors

  • Yan, Jun;Zhang, Wei
    • Journal of Computing Science and Engineering
    • /
    • v.5 no.2
    • /
    • pp.131-140
    • /
    • 2011
  • Different cores typically share the last-level cache in a multi-core processor. Threads running on different cores may interfere with each other. Therefore, the multi-core worst-case execution time (WCET) analyzer must be able to safely and accurately estimate the worst-case inter-thread cache interference. This is not supported by current WCET analysis techniques that manly focus on single thread analysis. This paper presents a novel approach to analyze the worst-case cache interference and bounding the WCET for threads running on multi-core processors with shared L2 instruction caches. We propose to use an interference matrix to model inter-thread interference, on which basis we can calculate the worst-case inter-thread cache interference. Our experiments indicate that the proposed approach can give a worst-case bound less than 1%, as in benchmark fib-call, and an average 16.4% overestimate for threads running on a dual-core processor with shared-L2 cache. Our approach dramatically improves the accuracy of WCET overestimatation by on average 20.0% compared to work.

Fast computation of Observation Probability for Speaker-Independent Real-Time Speech Recognition (실시간 화자독립 음성인식을 위한 고속 확률계산)

  • Park Dong-Chul;Ahn Ju-Won
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.30 no.9C
    • /
    • pp.907-912
    • /
    • 2005
  • An efficient method for calculation of observation probability in CDHMM(Continous Density Hidden Markov Model) is proposed in this paper. the proposed algorithm, called FCOP(Fast Computation of Observation Probability), approximate obsewation probabilities in CDHMM by eliminating insignificant PDFs(Probability Density Functions) and reduces the computational load. When applied to a speech recognition system, the proposed FCOP algorithm can reduce the instruction cycles by $20\%-30\%$ and can also increase the recognition speed about $30\%$ while minimizing the loss in its recognition rate. When implemented on a practical cellular phone, the FCOP algorithm can increase its recognition speed about $30\%$ while suffering $0.2\%$ loss in recognition rate.

Low-latency SAO Architecture and its SIMD Optimization for HEVC Decoder

  • Kim, Yong-Hwan;Kim, Dong-Hyeok;Yi, Joo-Young;Kim, Je-Woo
    • IEIE Transactions on Smart Processing and Computing
    • /
    • v.3 no.1
    • /
    • pp.1-9
    • /
    • 2014
  • This paper proposes a low-latency Sample Adaptive Offset filter (SAO) architecture and its Single Instruction Multiple Data (SIMD) optimization scheme to achieve fast High Efficiency Video Coding (HEVC) decoding in a multi-core environment. According to the HEVC standard and its Test Model (HM), SAO operation is performed only at the picture level. Most realtime decoders, however, execute their sub-modules on a Coding Tree Unit (CTU) basis to reduce the latency and memory bandwidth. The proposed low-latency SAO architecture has the following advantages over picture-based SAO: 1) significantly less memory requirements, and 2) low-latency property enabling efficient pipelined multi-core decoding. In addition, SIMD optimization of SAO filtering can reduce the SAO filtering time significantly. The simulation results showed that the proposed low-latency SAO architecture with significantly less memory usage, produces a similar decoding time as a picture-based SAO in single-core decoding. Furthermore, the SIMD optimization scheme reduces the SAO filtering time by approximately 509% and increases the total decoding speed by approximately 7% compared to the existing look-up table approach of HM.

A Study on Power Dissipation of The Microprocessor Based on Trace-Driven Simulation (명령어 자취형 모의실험을 기반으로 하는 마이크로프로세서의 전력 소비에 대한 연구)

  • Lee, Jongbok
    • The Journal of the Institute of Internet, Broadcasting and Communication
    • /
    • v.16 no.5
    • /
    • pp.191-196
    • /
    • 2016
  • Recently, power dissipation is a very significant issue not only in embedded systems and mobile devices but also in high-end modern processors. Especially, by the prevalent use of smart phones and tablet PCs, low power consumption of microprocessors is requisite. In this paper, a fast power measurement tool for a high performance microprocessor based on the trace-driven simulator has been developed. The power model of the microprocessor consists of complex combinational circuits, array structures, and CAM structures. Using SPEC 2000 benchmarks as input, the trace-driven simulation has been performed to estimate the average power dissipation of each program.

Development of Tablet PC-Based Multimedia Educational Contents for Patients and Their Family Undergoing Thoracic Surgery (흉부수술 환자와 가족을 위한 태블릿 PC기반 멀티미디어 교육자료 개발)

  • Kim, Jung Eun;Hwang, Seon Young
    • Journal of Korean Clinical Nursing Research
    • /
    • v.22 no.1
    • /
    • pp.99-108
    • /
    • 2016
  • Purpose: This study aims to develop Tablet PC-based multimedia educational contents on the procedures from surgery preparation to recovery for hospitalized patients who are going to undergo thoracic surgery and their families. Methods: The educational contents were created based on literature review and a survey of needs in patients and their families who were admitted to a hospital in Seoul from Dec. 2013 to May 2014. The contents were developed in conjunction with a film production company. The educational materials including texts, images, sounds, and videos were developed appling the ADDIE (analysis, design, development, implementation, and evaluation) model. Results: Two multimedia educational contents were developed for the patients with coronary artery bypass graft or lung surgery. Each content consisted of six subdivisions of self-learning for 20 minutes. The developed educational contents were completed after testing content validity by 30 medical experts. Conclusion: This study recommends that the Tablet PC-based educational contents for thoracic and cardiovascular patients and their families be used in general wards and intensive care units to relieve their anxiety before surgery and reduce postoperative complications.

Efficient Verification Method with Random Vectors for Embedded Control RISC Cores (내장형 제어 RISC코어를 위한 효율적인 랜덤 벡터 기능 검증 방법)

  • Yang, Hun-Mo;Gwak, Seung-Ho;Lee, Mun-Gi
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.38 no.10
    • /
    • pp.735-745
    • /
    • 2001
  • Processors require both intensive and extensive functional verification in their design phase due to their general purpose. The proposed random vector verification method for embedded control RISC cores meets this goal by contributing assistance for conventional methods. The proposed method proved its effectiveness during the design of CalmRISCTM-32 developed by Yonsei Univ. and Samsung. It adopts a cycle-accurate instruction level simulator as a reference model, runs simulation in both the reference and the target HDL and reports errors if any difference is found between them. Consequently, it successfully covers errors designers easily pass over and establishes other new error check points.

  • PDF

Development of Web-based Learning Program on Cardiopulmonary Emergency Care Focused on Clinical Scenarios (웹기반 사례중심 심폐응급간호 학습 프로그램 개발)

  • Kim, Eun-Jung;Hwang, Seon-Young
    • Korean Journal of Adult Nursing
    • /
    • v.22 no.1
    • /
    • pp.70-79
    • /
    • 2010
  • Purpose: This study was conducted to develop a Web-based learning program on cardiopulmonary emergency care for clinical nurses and to evaluate learners' responses. Methods: Based on the assessment of learning needs of clinical nurses, a total of three self-directed learning modules were developed according to the procedure of the ADDIE (assessment, design, development, implementation, & evaluation) model. Results: Each learning module included the emergency treatments and drugs used in the real patients' situations with cardiopulmonary crisis, which had been adopted from the emergency department of a C University hospital located in G-city. Real video clips for endotracheal intubation and ACLS (advanced cardiac life support) were developed with the help of the staff of the department of emergency medicine using a human simulator, $SimMan^{(R)}$. The program published on the Web was evaluated by 20 clinical nurses who are working in the emergency department and wards of a C-University hospital. About 80% of the respondents were satisfied with the program contents, design, and learning strategy. Conclusions: Web-based learning programs on cardiopulmonary emergency care are needed for clinical nurses as educational material for staff education to increase their knowledge for making immediate clinical decisions and in giving skilled care in emergency situations.

A study about production process management that use QR Codes (QR코드를 활용한 생산 공정관리 적용방법 연구)

  • Kim, jung-cheol;Moon, il-young
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2013.05a
    • /
    • pp.448-450
    • /
    • 2013
  • QR codes, a kind of 2-dimensional barcode, is used to encode information such as simple URLs or namecards. QR codes can store much more information than a just barcode can do. Now QR code is very popular service in our ordinary life. These days many companies has used QR codes in the way of home-page link, especially a production explanation, the material instruction of model houses, the services in a library and on-line events, etc. This paper is going to make a study about how to establish a production process management on the basis of QR codes, addedly, about strong points of QR codes and the examples of using it.

  • PDF

An Experimental Study on the Thermal Performance Measurement of Large Diameter Borehole Heat Exchanger(LD-BHE) for Tripe-U Pipes Spacer Apply (3중관용 스페이서를 적용한 대구경 지중열교환기의 성능측정에 관한 연구)

  • Lee, Sang-Hoon;Park, Jong-Woo;Lim, Kyoung-Bin
    • 한국신재생에너지학회:학술대회논문집
    • /
    • 2009.11a
    • /
    • pp.581-586
    • /
    • 2009
  • Knowledge of ground thermal properties is most important for the proper design of large scale BHE(borehole heat exchanger) systems. The type, pipe size and thermal performance of the BHE is highly dependent on the ground source heatpump system-efficiency and instruction cost. Thermal response tests with mobile measurement devices were developed primarily for insitu determination of design data for large diameter BHE for triple-U spacer apply. The main purpose has been to determine insitu values of effective ground thermal conductivity and thermal resistance, including the effect of ground-water flow and natural convection in the boreholes. The test rig is set up on a some trailer, and contains a circulation pump, a inline heater, temperature sensors, flow meter, power analysis meter and a data logger for recording the temperature, fluid flow data. A constant heat power is injected into the borehole through the tripl-U pipes system of test rig and the resulting temperature change in the borehole is recorded. The recorded temperature data are analysed with a line-source model, which gives the effective insitu values of rock thermal conductivity and borehole thermal resistance of large diameter BHE for spacer apply.

  • PDF