• Proceedings of the KIEE Conference
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• 2007.04a
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• pp.89-91
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• 2007

In this paper, a new approach for a sampled-data representation of nonlinear system that has time-delayed multi-input is proposed. That is largely devoid of illconditioning and is suitable for any nonlinear problem. The new scheme is applied to nonlinear systems with two or three inputs; and then the delayed multi-input general equation is derived. The method is based on thematrix exponential theory. Itdoes not require excessive computational resources and lends itself to a short and robust piece of software that can be easily inserted into large simulation packages. A performance of the proposed method is evaluated using a nonlinear system with time-delay: maneuvering an automobile.

• 제어로봇시스템학회:학술대회논문집
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• 1996.10b
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• pp.1455-1458
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• 1996

In this paper trajectory tracking control problems are described for a robot manipulator by using pneumatic actuator. Under the assumption that the so-called independent joint control is applied to the control system, the dynamic model for each link is identified as a linear second-order system with input time-delay by the step response. Then, an optimal servo controller is designed by taking account of such a time-delay. The effectiveness of the proposed control method is illustrated through some simulations and experiments for the robot manipulator.

• 제어로봇시스템학회:학술대회논문집
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• 1992.10a
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• pp.845-849
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• 1992

The disturbance and time delay can often cause a significant error in the estimation of trajectory of a underwater vehicle. The time delay considered in this study is due to the delayed rudder response to the rudder input from the guidance control part. The simulation tests are performed on maneuver with constant rudder angle, zigzag maneuver, dive-climb maneuver, and corridor pattern maneuver. The results are compared with those of without delay cases.

• Journal of the Korean Institute of Telematics and Electronics
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• v.24 no.4
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• pp.701-707
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• 1987

This paper is concerned with an accurate delay time modling of the ED MOS logic gates and its application to the multiple delay logic simulator. The proposed delay model of the ED MOS logic gate takes account of the effects of not only the loading conditions but also the slope of the input waveform. Defining delay as the time spent by the current imbalance of the active inverter to charge and discharge the output load, with respect to physical reference levels, rise and fall model delay times are obtained in an explicit formulation, using optimally weighted imbalance currents at the end points of the voltage transition. A logic simulator which uses multiple rise/fall delays based on the model as decribed in the above has been developed. The new delay model and timing verification method are evaluated with repect to delay accuracy and execution time.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.28 no.6
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• pp.444-451
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• 2017

In this paper, we have evaluated and analyzed OTFS(Orthogonal Time Frequency Space) modulation and OTFS-MIMO(Multiple Input Multiple Output) system. OTFS modulation can concisely compensate delay-Doppler spreading effect by using 2D(2-Dimension) iDFT (inverse Discrete Fourier Transform) and DFT(Discrete Fourier Transform) operation. It enables OTFS system to transmit high-speed data. Especially, OTFS-MIMO system can transmit all data streams without performance degradation on high Doppler frequency channel. As simulation results, we have confirmed that $1{\times}1$ OTFS system's achievable rate is a similar to each stream of $2{\times}2$ OTFS-MIMO system. That is, we have also confirmed that $2{\times}2$ MIMO system can completely achieve double achievable rate in comparison with OTFS system on high Doppler frequency channel.

• Korean Journal of Audiology
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• v.24 no.4
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• pp.174-179
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• 2020

Background and Objectives: The integration of auditory-visual speech information improves speech perception; however, if the auditory system input is disrupted due to hearing loss, auditory and visual inputs cannot be fully integrated. Additionally, temporal coincidence of auditory and visual input is a significantly important factor in integrating the input of these two senses. Time delayed acoustic pathway caused by the signal passing through digital signal processing. Therefore, this study aimed to investigate the effects of hearing loss and hearing aid digital delay circuit on sound-induced flash illusion. Subjects and Methods: A total of 13 adults with normal hearing, 13 with mild to moderate hearing loss, and 13 with moderate to severe hearing loss were enrolled in this study. Subsequently, the sound-induced flash illusion test was conducted, and the results were analyzed. Results: The results showed that hearing aid digital delay and hearing loss had no detrimental effect on sound-induced flash illusion. Conclusions: Transmission velocity and neural transduction rate of the auditory inputs decreased in patients with hearing loss. Hence, the integrating auditory and visual sensory cannot be combined completely. Although the transmission rate of the auditory sense input was approximately normal when the hearing aid was prescribed. Thus, it can be concluded that the processing delay in the hearing aid circuit is insufficient to disrupt the integration of auditory and visual information.

• Journal of Power Electronics
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• v.15 no.4
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• pp.1085-1092
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• 2015

In this paper, the expressions of the estimated information of a single-phase enhanced phase-locked loop (EPLL), when input signal contains harmonics and a DC offset while the fundamental component takes step changes, are derived. The theoretical analysis results indicate that in the estimated information, the n^th-order harmonics cause n+1^th-order periodic ripples, and the DC offset causes a periodic ripple at the fundamental frequency. Step changes of the amplitude, phase angle and frequency of the fundamental component cause a transient periodic ripple at twice the frequency. These periodic ripples deteriorate the performance of the EPLL. A hybrid filter based EPLL (HF-EPLL) is proposed to eliminate these periodic ripples. A delay signal cancellation filter is set at the input of the EPLL to cancel the DC offset and even-order harmonics. A sliding Goertzel transform-based filter is introduced into the amplitude estimation loop and frequency estimation loop to eliminate the periodic ripples caused by the residual input odd-order harmonics and step change of the input fundamental component. The parameter design rules of the two filters are discussed in detail. Experimental waveforms of both the conventional EPLL and the proposed HF-EPLL are given and compared with each other to verify the theoretical analysis and advantages of the proposed HF-EPLL.

• 제어로봇시스템학회:학술대회논문집
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• 2001.10a
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• pp.68.1-68
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• 2001

This paper discusses tracking position control of linear actuator that has a time delay. The time delay happens when the process reads the sensor data and sends the control input to the plant located at a remote site in distributed control system. In this thesis, the time delay between the linear actuator and the discrete PID controller has constant value due to buffer device so the time delay can be modeled by Pade approximation but the large position error of the linear actuator is generated by the time delay. Therefore, the Smith predictor is used for tracking position control of the linear actuator with the time delay in order to minimize the effect of the time delay. The experimental and simulation results show that the ...

• Journal of Advanced Marine Engineering and Technology
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• v.28 no.4
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• pp.603-610
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• 2004

Time delays are included in most of actual systems, and some of which are shown as time varying. To analyze the time varying time delay system in the time domain. a useful delay module to express the function as a tool is much helpful to get corresponding outputs under given conditions. A method is proposed here to design the algorithm of time delay module for simulation or control purposes, including the problems of initializing and reallocating data in buffer. After classifying the time varying time delay into the distributed mode and lumped mode, an object to describe delay module is configured and tested under the defined input signal and given time delay variation. The simulation results show that the output of module matches reasonably with the case of real system.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.53 no.4
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• pp.200-207
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• 2004

This paper presents a simple and fast delay metric RC-class interconnects under saturated ramp inputs. The RC delay metric under saturated ramp inputs, called FDM(Fast Delay Metric), can estimate delay times at an arbitrary node using a simple closed-form expression and is extended from delay metric under step input easily As compared with similar techniques proposed in previous researches, it is shown that the FDM technique complexity for a similar accuracy. As the number of circuit nodes increases, there will be a significant difference in estimation times of RC delay between the previous techniques based on two circuit moments and the FDM which do not depend on circuit moments.