• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07b
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• pp.1217-1219
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• 2003

상용화되어 있는 이동통신 기기의 Front-end 부분은 듀플렉서와 필터를 포함하는 수동소자로 구성되어 있다. 듀플렉서의 임피던스 정합선로는 전송선로 이론으로부터 설계하며, 단순하게 ${\lambda}=1/4$ 파장 길이의 정합 선로를 설치하는 것이기 때문에 정합선로를 이용한 듀플렉서 성능을 극대화하기 위한 설계의 융통성이 없는게 현실이다. 이런 문제점을 해결하기 위하여 집중소자(lumped element)인 R L C를 탄성 표면파 듀플렉서 대신 스위치 모들에 적용하게 된다면 여러 가지 다양한 형태의 회로를 구현할 수 있고 회로망 내에 위치하는 집중소자의 정격을 최적화하여 스위치 모듈의 성능을 향상시킬 수 있는 가능성이 있다. 본 연구에서는 $900 MHz{\sim}2.2 GHz$의 대역에서 소형화 집적화에 적용 가능한 디바이스를 개발하기 위하여 고주파, 저진압, 저손실 스위치 모듈의 제조와 구성되는 커패시터와 인덕터의 제조와 특성에 관하여 연구하였다.

• Journal of the Korean Society for Precision Engineering
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• v.32 no.5
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• pp.455-461
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• 2015

This paper deals with an experimental verification of a temperature-dependent power loss model of a DC/DC converter in severe temperature conditions. The power loss of a DC/DC converter is obtained by summing the losses by the components constituting the converter including switching elements, diodes, inductors, and capacitors. MIL-STD-810F stipulates that any electronic devices must be operable in the temperature ranging from $-50^{\circ}C$ to $70^{\circ}C$. We summarized the temperature-dependent loss models for the converter components. A SEPIC-type converter is designed and built as a target. Using a constant-temperature chamber, a test rig is set up to measure the power loss of the converter. The experimental results confirm the validity of the loss model within 4.5% error. The model can be useful to predict the efficiency of the converter at the operating temperature, and to provide guidelines in order to improve the efficiency.

• The Journal of the Korea institute of electronic communication sciences
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• v.16 no.3
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• pp.477-484
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• 2021

The 4kW class inverter for portable ESS designed through this study achieves lightweight and high power density by reducing the volume of passive devices (capacitors, inductors, etc.) suitable for portable use, and minimizes heat loss of the MOSFET through the low on resistance of the MOSFET. So that high efficiency can be achieved. In addition, in order to deliver high quality energy, it is designed to have a low THDV in accordance with the current KEPCO business handling guidelines, and is designed to output a sine wave with low distortion.

• Transactions on Electrical and Electronic Materials
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• v.17 no.5
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• pp.261-269
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• 2016

A high-performance transmit/receive (T/R) switch is essential for every radio-frequency (RF) device. This paper proposes a T/R switch that is designed in the CEDEC 0.13 μm complementary metal-oxide-semiconductor (CMOS) technology for 2.4 GHz ISM-band RF applications. The switch exhibits a 1 dB insertion loss, a 28.6 dB isolation, and a 35.8 dBm power-handling capacity in the transmit mode; meanwhile, for the 1.8 V/0 V control voltages, a 1.1 dB insertion loss and a 19.4 dB isolation were exhibited with an extremely-low power dissipation of 377.14 μW in the receive mode. Besides, the variations of the insertion loss and the isolation of the switch for a temperature change from - 25℃ to 125℃ are 0.019 dB and 0.095 dB, respectively. To obtain a lucrative performance, an active inductor-based resonant circuit, body floating, a transistor W/L optimization, and an isolated CMOS structure were adopted for the switch design. Further, due to the avoidance of bulky inductors and capacitors, a very small chip size of 0.0207 mm² that is the lowest-ever reported chip area for this frequency band was achieved.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.2
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• pp.162-172
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• 2011

In this paper, a design and fabrication of 4 W power amplifier for the WiMAX frequency band(2.3~2.7 GHz) are presented. The adopted active device is a commercially available GaN HEMT chip of Triquint Company, which is recently released. The optimum input and output impedances are extracted for power amplifier design using a specially self-designed tuning jig. Using the adopted impedances value, class-F power amplifier was designed based on EM simulation. For integration and matching in the small package module, spiral inductors and interdigital capacitors are used. The fabricated power amplifier with $4.4{\times}4.4\;mm^2$ shows the efficiency above 50 % and harmonic suppression above 40 dBc for second(2nd) and third(3rd) harmonic at the output power of 36 dBm.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2000.11a
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• pp.61-64
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• 2000

We fabricated and characterized Low Noise Amplifier (LNA) using MCM-C (Multi-Chip-Module-Cofired) technology for 2.14 GHz IMT-2000 mobile terminal application. First, We designed LNA circuits and simulated it's high frequency characteristics using circuits simulator. For the simulation, we adopted high frequency libraries of all the devices used in LNA samples. By the simulation, Gain was 17 dB and Noise Figure was 1.4 dB. We used multilayer process of LTCC (Low Temperature Co-fired Ceramics) substrate and conductor, resistor pattern for the MCM-C LNA fabrication. We made 2 buried inductors, 2 buried capacitors and 3 buried resistors. The number of the total layers was 6. On the top layer, we patterned microstrip line and pads for the SMT device. We measured the high frequency characteristics, and the results were 14.7 dB Gain and 1.5 dB Noise Figure.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.1
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• pp.69-78
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• 2007

A Frequency synthesizer for T-DMB and mobile-DTV applications was designed using $0.18{\mu}m$ CMOS process with 1.8V supply. PMOS transistors were chosen for VCO core to reduce phase noise. The VCO range is 920MHz-2100MHz using switchable inductors, capacitors and varactors. Varactor biases that improve varactor acitance characteristics were minimized as two, and $K_{VCO}$(VCO gain) value was aintained by switchable varactor. Additionally, VCO was designed that VCO gain and the interval of VCO gain were maintained using VCO gain compensation logic. VCO, PFD, CP and LF were verified by Cadence Spectre, and divider was simulated using Matlab Simulink, ModelSim and HSPICE. VCO consumes 10mW power, and is 56.3% tuning range. VCO phase noise is -127dBc/Hz at 1MHz offset for 1.58GHz output frequency. Total power consumption of the frequency synthesizer is 18mW, and lock time is about $140{\mu}s$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.7
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• pp.844-847
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• 2012

By using LHTL(Left-Handed Transmission Line) which is a form of a metamaterial and conventional RHTL (Right-Handed Transmission Line), we designed, fabricated and tested a broadband $90^{\circ}$ coupler which is a basic circuit for I-Q vector signal generation. Synthetic LHTL and RHTL were implemented with capacitors and inductors only, that the size is minimized. Also, by implementing a Wilkinson power divider which is required for the suggested circuit using a synthetic RHTL, the size of whole circuit is only $11mm{\times}12mm$. For the frequency range 0.8~1.25 GHz, the phase difference at the outputs maintained $90^{\circ}{\pm}5^{\circ}$ and thus, a broadband $90^{\circ}$ coupler could be made in a compact form. for the same frequency range, the insertion loss is less than 1.6 dB and return loss is more than 10.1 dB. To the best of our knowledge, this is the smallest and broadband $90^{\circ}$ coupler for the frequency range and if the circuit is made with MMIC(Monolithic Microwave Integrated Circuit) technology, the size will be reduced much further.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.2
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• pp.353-360
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• 2017

Recently, due to physical limitation of Si based power semiconductor, development speed of switching power semiconductors is falling and it is difficult to expect any further performance improvements. SiC based power semiconductor with superior characteristic than Si-based power semiconductor have been developed to overcome these limitations. however, there is not method to apply for real system. Therefore, suggested the feasibility and solution for SiC-based power semiconductor system. design to 1kW class DC-DC boost converter and demonstrated the superiority of SiC MOSFET under the same operating conditions by analyzing switching frequency, duty ratio, voltage and current, and comparing with Si based power semiconductor through experimental efficiency according to each system load. The SiC MOSFET has high efficiency and fast switching speed, and can be designed with small inductors and capacitors which has the advantage of volume reduction of the entire system.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.11
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• pp.66-70
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• 2016

This paper presents an 24 GHz I/Q LO generator for a heartbeat measurement radar system. In order to improve the mismatch performance between I and Q LO signals against process variation, a 24 GHz I/Q LO generator employing a low-pass phase shifter and a high-pass phase shifter composed of inductors and capacitors is proposed. The proposed 24 GHz I/Q LO generator consists of an LO buffer, a low-pass phase shifter and a high-pass phase shifter. It was designed using a 65 nm CMOS technology and draws 8 mA from a 1 V supply voltage. The proposed 24 GHz I/Q LO generator shows a gain of 7.5 dB, a noise figure of 2.3 dB, 0.1 dB gain mismatch and $4.3^{\circ}$ phase mismatch between I and Q-path against process and temperature variations for the operating frequencies from 24.05 GHz to 24.25 GHz.