• Journal of the Korean Society for Precision Engineering
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• v.21 no.10
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• pp.94-101
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• 2004

This paper presents the development of a keypad test system for the improvement of working environment and productivity using PTC 16F877 microprocessor. In order to detect the fault of keypad products, hardware and software design is performed in this system. Keypad fault detection system is controlled by the 8 bit one chip PIC microcontroller for the exactness and speed. Developed panel of the keypad test system is comprised of the sub-panel for selecting in the inspected keypad types and the main panel f3r displaying the working order and fault position. Furthermore, all data from keypad inspection are stored in main memory of personal computer for the database. All these functions lead to the improvement of working speed and environment.

• Journal of the Semiconductor & Display Technology
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• v.5 no.1 s.14
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• pp.5-11
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• 2006

One of the most important is to insure that a new circuit design is qualified far release before it is scheduled for manufacturing, test, assembly and delivery. Due to various causes, there happens to be a low yield in the wafer process. Wafer test is a critical process in analyzing the chip characteristics in the EDS(electric die sorting) using analytic tools -wafer map, wafer summary and datalog. In this paper, we propose new analytic map algorithms for DDI chip test data. Using the proposed analytic map algorithms, we expect to improve the yield, quality and analysis time.

• Proceedings of the IEEK Conference
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• 2003.11b
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• pp.27-30
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• 2003

The recent technology developments introduce new difficulties into the test process by the increased complexity of the chip. Most widely used method for testing high complexity and embedded systems is built-in self-test(BIST). In this paper, we describe 5-stage pipeline system as circuit under testing(CUT) and proposed a BIST scheme for the hazard detection unit of the pipeline system. The proposed BIST scheme can generate sequential instruction sets by pseudo-random pattern generator that can detect all hazard issues and compare the expected hazard signals with those of the pipelined system. Although BIST schemes require additional area in the system, it proves to provide a low-cost test solution and significantly reduce the test time.

• Journal of the Institute of Convergence Signal Processing
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• v.16 no.3
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• pp.90-95
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• 2015

This study presents a method to test quite small-sized and light-weighted micro-drill bits which are used to make holes in printed circuit boards(PCB). After getting images of micro-drill bits through the high resolution microscope, we developed image processing algorithms to detect fiducial points, and then measured diverse factors of the drill-bit based on these points. We also developed the window-based inspection system to automatically discriminate normal and abnormal status. For the relative comparison of its performance, the system was compared with an existing inspection system using test images. Experimental results showed that the proposed system slightly improved performance, and also classified correctly some misjudged errors which were occurred in the existing system.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.363_364
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• 2009

Even though underground transmission cable is an essential transmission method to supply stable power for downtown and population center, interaction of electromagnetic force from fault current is very large comparing to overhead transmission line due to restricted installation space such as tunnel, etc. and close consideration is required for it. This paper presents countermeasures to reduce and release the effect of electromagnetic force with rope binding and installation of spacer and describes its efficacy through three phase short-circuit test, which will be utilized as basic materials for improvement and development of cleat, hanger, etc. to reduce and release effect of electromagnetic force in the future.

• Progress in Superconductivity and Cryogenics
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• v.11 no.1
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• pp.25-29
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• 2009

To reduce the power loss in normal state, non-inductively wound high temperature superconducting (HTS) coils are used for fault current limiter (FCL) application. Non-inductively wound coils can be classified into two types: solenoid type and pancake type. These two types have different electrical and thermal and mechanical characteristics due to their winding structure difference. This paper deals with the current limiting characteristics, magnetic field analysis of the two coils. Simulation using finite element method (FEM) was used to analyze the magnetic field distribution and inductance of the coils. Short circuit test using stabilizer-free coated conductor (CC) was also carried out. We can compare the characteristics of the two types of coil by using the data obtained from simulation and short circuit test. We confirmed the feasibility of FCL application by the analysis about the characteristics of non-inductively wound coil using CC.

• Nuclear Engineering and Technology
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• v.55 no.10
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• pp.3860-3865
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• 2023

A metallic microcell UO₂ pellet has a microstructure where a metal wall is connected to overcome the low thermal conductivity of the UO₂ fuel pellet. It has been verified that metallic microcell fuel pellets provide an impressive reduction of the fuel centerline temperature through a Halden irradiation test. However, it is difficult to predict the effective thermal conductivity of these pellets and researchers have had to rely on measurement and use of the finite element method. In this study, we designed a unit microcell model using a thermal resistance circuit to calculate the effective thermal conductivity on the basis of the microstructure characteristics by using the aspect ratio and compared the results with those of reported metallic UO₂ microcell pellets. In particular, using the thermal conductivity calculated by our model, the fuel centerline temperature of Cr microcell pellets on the 5th day of the Halden irradiation test was predicted within 6% error from the measured value.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.17 no.4
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• pp.266-274
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• 2024

In this paper, we designed a low-area 32-bit PF (Poly-fuse) OTP IP, a non-volatile memory that stores data required for analog circuit trimming and calibration. Since one OTP cell is constructed using two PFs in one select transistor, a 1cell-2bit multibit PF OTP cell that can program 2bits of data is proposed. The bitcell size of the proposed 1cell-2bit PF OTP cell is 1/2 of 12.69㎛ × 3.48㎛ (=44.161㎛2), reducing the cell area by 33% compared to that of the existing PF OTP cell. In addition, in this paper, a new 1 row × 32 column cell array circuit and core circuit (WL driving circuit, BL driving circuit, BL switch circuit, and DL sense amplifier circuit) are proposed to meet the operation of the proposed multbit cell. The layout size of the 32bit OTP IP using the proposed multibit cell is 238.47㎛ × 156.52㎛ (=0.0373㎛2) is reduced by about 33% compared that of the existing 32bit PF OTP IP using a single bitcell, which is 386.87㎛ × 144.87㎛ (=0.056㎛2). The 32-bit PF OTP IP, designed with 10 years of data retention time in mind, is designed with a minimum programmed PF sensing resistance of 10.5㏀ in the detection read mode and of 5.3 ㏀ in the read mode, respectively, as a result of post-layout simulation of the test chip.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.38 no.1
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• pp.45-50
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• 2014

A vibration test coupon is prepared with nine plastic ball grid array packages on a printed circuit board using SnPb solders, and a random vibration test is conducted on the coupon. Life data from the test are analyzed, and it is shown that over the board, life data is location-dependent. For investigating this location dependency, a finite element model is developed and the equivalent stresses, which are defined based on the stress response functions at each node, are investigated. It is shown that one of the corner solder balls has the maximum equivalent stress at a package during the test. Finally, it is demonstrated that the maximum equivalent stress and durability life are inversely proportional.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.26 no.8
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• pp.1565-1576
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• 2002

By way of driving a 2-way on/off solenoid hydraulic valve with a pulse width modulation (PWM) signal, control of the pressure in a certain volume is frequently used in various applications. However, the pressure built-up according to the duty ratio and carrier frequency of the PWM signal is not so well understood. In order to clarify the characteristics of 2-way valve hydraulic pressure control systems, in this paper two formula fur the mean and ripple of the load pressure were derived through theoretical analysis. And the accuracy of the derived formula were verified by comparison with the experimental test result. Generally 2-way valve systems are constructed as a bleed-off circuit, while 3-way valves are used as a control element in a meter-in circuit pressure control system. In a bleed-off circuit, the system supply pressure from a hydraulic power pack does not remain constant, but changes according to their external load. In turn, the relief valve in the hydraulic power pack reacts accordingly showing complicated dynamic behavior, which makes an analytical study difficult. In order to resolve the problem, simple but accurate empirical dynamic models fer a bleed-off system were used in the course of formula derivation. As the result, selection criteria for two major control parameters of the driving signal is established and the basic strategy to suppress the unnecessary pressure fluctuation can be provided for a hydraulic pressure control system using a 2-way on/off solenoid valve.