• The KIPS Transactions:PartC
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• v.10C no.6
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• pp.717-726
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• 2003

In this paper, we analyze the associated rule based deductive algorithm which creates the rules automatically for intrusion detection from the vast packet data. Based on the result, we also suggest the deductive algorithm which creates the rules of intrusion pattern fast in order to apply the intrusion detection systems. The deductive algorithm proposed is designed suitable to the concept of clustering which classifies and deletes the large data. This algorithm has direct relation with the method of pattern generation and analyzing module of the intrusion detection system. This can also extend the appication range and increase the detection speed of exiting intrusion detection system as the rule database is constructed for the pattern management of the intrusion detection system. The proposed pattern generation technique of the deductive algorithm is used to the algorithm is used to the algorithm which can be changed by the supporting rate of the data created from the intrusion detection system. Fanally, we analyze the possibility of the speed improvement of the rule generation with the algorithm simulation.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.46 no.2
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• pp.57-64
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• 2009

This paper presents the hardware implementation of the pyramidal KLT(Kanade-Lucas-Tomasi) feature tracker. Because of its high computational complexity, it is not easy to implement a real-time KLT feature tracker using general-purpose processors. A hardware implementation of the pyramidal KLT feature tracker using FPGA(Field Programmable Gate Array) is described in this paper with emphasis on 1) adaptive adjustment of threshold in feature extraction under diverse lighting conditions, and 2) modification of the tracking algorithm to accomodate parallel processing and to overcome memory constraints such as capacity and bandwidth limitation. The effectiveness of the implementation was evaluated over ones produced by its software implementation. The throughput of the FPGA-based tracker was 30 frames/sec for video images with size of $720{\times}480$.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.2
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• pp.58-69
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• 1998

A contrp; suste, fpr SCARA robot is designed for implememting a robust dynamic control algorithm. this study forcuses on the use of DSPs in the design of joint controllers and interfaces in between the host cotroller and four joint controllers and in between the joint controllers and four servo drives. The mechanical body of SCARA robot and the servo drives are selected from the commercially available ones. The four joint controllers, assigned to each joint one by one, are combined into a common system through a mother board hardwarewise and through the global memeory softwarewise. The mother board is designed to connect joint controllers onto the board through the slots adopting PC/104 bus structures. And, the global memory stores the common data which can be shared by joint controllers and the host computer directly, which virtually combines the whole system into one. To demonstrate the performance and efficienty of the sytem, a robust inverse dynamic algorithm is proposed and implemented for a faster and more precise control. The robust inverse dynamic algorithm is basically derived from an inverse dynamci algorithm and a PID compensator. Based upon the derived dynamic equitions of SCARA robot, the inverse dynamic algorithm is intitially implemented within 0.3 msec of the control cycle in this system. The algoithm is found to be not accurate enough for the high speed and precision tasks due to inherent modelling errors and time-varying factors. Therefore, a variable PID algorithm is combined with the inverse dynamic algorithm to support robustness of control performance. Experimental datfor the proposed algorithm are presented and compared with the result obtained from PID and inverse dynamic algorithm.

• The KIPS Transactions:PartC
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• v.11C no.6 s.95
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• pp.851-862
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• 2004

RFID(Radio frequency IDentification) is a technology that automatically identifies objects containing the electronic tags by using radio wave. The multi-tag identification problem is the core issue in the RFID and could be resolved by the anti-collision algorithm. However, most of the existing anti-collision algorithms have a problem of heavy implementation cost and low performance. In this paper. we propose a new tree based memoryless anti-collision algorithm called a collision tracking tree algorithm and presents its performance evaluation results obtained by simulation. The Collision Tracking Tree algorithm proves itself the capability of an identification rate of 749 tags per second and the performance evaluation results also show that the proposed algorithm outperforms the other two existing tree-based memoryless algorithms, i.e., the tree-walking algorithm and the query tree algorithm about 49 and 2.4 times respectively.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.10
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• pp.1935-1942
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• 2017

Recently, a compression algorithm is widely used as a method for compressing geographic information data. However, such a compression algorithm has a problem that the continuity of the map data is insufficient to actually apply it to the geographic information data compression, and the compression rate is lowered because it can not be compressed into a single data. Therefore, in this paper, we have designed and implemented a Run-Length / Byte-Packing compression algorithm that enables compression of geographic information by combining the advantages of compression algorithms and improves compression and restoration speed. As a result of evaluating the implemented algorithm, it was confirmed that the proposed algorithm improved about 5% on average compared with the existing compression algorithm, and it was confirmed that the compression rate and the restoration speed were improved.

• Journal of the Institute of Convergence Signal Processing
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• v.10 no.3
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• pp.158-163
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• 2009

LMS(Least Mean Square) algorithm requires simple equation and is used widely because of the low complexity. If the convergence speed increase, LMS algorithm has a divergence in case of sharp environment changes. And if a stability increase, the convergence speed becomes slow. This algorithm based on a trade off between fast convergence and system stability. To improve this problem, VSSLMS (Variable Step Size LMS) algorithm was developed. The VSSLMS algorithm improved the convergence speed and performance as adjusting step size using error signal. In this paper, I-VSSLMS algorithm is proposed tor improve the performance of adaptive noise canceller in real-time environments. The proposed algorithm is applied to adaptive noise canceller using TMS320C6713 DSP board and we did simulation by real time. Then we compared performance of each algorithm and demonstrated that proposed algorithm has superior performance.

• Proceedings of the Korea Committee for Ocean Resources and Engineering Conference
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• 2004.05a
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• pp.249-256
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• 2004

KRISO/KORDI is currently developing a deep-sea unmanned underwater vehicle (UUV) system which is composed of a launcher, an ROV, and an AUV. Two USBL acoustic positioning systems will be used for UUV's navigation. One is for the deep sea positioning of all three vehicles and the other is for AUV's guidance to the docking device on the launcher. In order to increase the position accuracy MFSK(Multiple Frequency Shift Keying) broadband signal will be used. As the first step to the implementation of a USBL system, this paper studies USBL positioning algorithm using MFSK signals. Firstly, the characteristics of MFSK signal is described with various MFSK parameters: number of frequencies, frequency step, center frequency, and pulse length. Time and phase delays between two received signals are estimated by using cross-correlation and cross-spectrum methods. Finally an USBL positioning algorithm is derived by converting the delays to difference of distances and applying trigonometry. The simulation results show that the position accuracy is improved highly when both cross-correlation and cross-spectrum of MFSK signals are used simultaneously.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.12A
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• pp.982-990
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• 2009

The IEEE 802.15.4 wireless sensor network is composed of the unique sensor devices to monitor and collect physical or environmental conditions. The interests in a positioning technology, which is one of the environment monitoring technologies, are gradually increased according to the development of the sensor technology and IT infrastructure. Generally, it is difficult for the positioning system using RSSI (Received Signal Strength Indication) based implementation to get accurate position because of obstacles, RF wave's delay and multipath. Therefore, in this paper, we investigate the improved positioning technologies for RSSI-based positioning system. This paper also proposes the enhanced scheme to improve the accuracy of positioning system by applying the Gaussian Filter algorithm, which is widely used for enhancing the performance of image processing system. For the implementation of proposed scheme, we firstly make a look-up tables, which represent the distance between target node and master node and corresponding RSSI value of each target node which are recorded as an average value after investigating the characteristics of attenuation of transmitted signal By applying the pre-determined look-up tables and Gaussian Filtering in the proposed scheme, we analyzed the positioning performance and compared with other conventional RSSI-based positioning algorithms.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.3
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• pp.715-722
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• 2010

This paper describes a hardware design of hash function processor which implements Korean Hash Algorithm Standard HAS-160. The HAS-160 processor compresses a message with arbitrary lengths into a hash code with a fixed length of 160-bit. To achieve high-speed operation with small-area, arithmetic operation for step-operation is implemented by using a hybrid structure of 5:3 and 3:2 carry-save adders and carry-select adder. It computes a 160-bit hash code from a message block of 512 bits in 82 clock cycles, and has 312 Mbps throughput at 50 MHz@3.3-V clock frequency. The designed HAS-160 processor is verified by FPGA implementation, and it has 17,600 gates on a layout area of about $1\;mm^2$ using a 0.35-${\mu}m$ CMOS cell library.

• Journal of Advanced Marine Engineering and Technology
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• v.40 no.3
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• pp.217-222
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• 2016

This study investigates the design, analysis, and implementation of the square-root extended Kalman filter by using an algorithm derived by combining the Potter or Carlson algorithm with the modified Gram-Schmidt algorithm, for sensorless speed control of a permanent-magnet synchronous motor. The sensitivity of the Kalman filter to round-off errors is a well-known problem. A possible way to address this limitation is by combining the square-root concept and Kalman filter that can improve the numerical performance and solve instability-related problems such as divergence. This paper presents the design and analysis of the implementation of such a square-root extended Kalman filter. To demonstrate the performance of the proposed filter, experimental results under several operating conditions, such as high and low speeds, reversal rotation, detuned parameters and load test, have been analyzed. Further, code sizes and operation times have been compared. Experimental results establish the performance of the proposed square-root extended Kalman filter-based estimation technique for sensorless speed control of a permanent-magnet synchronous motor.